Lateral double diffused metal oxide semiconductor device and manufacturing method thereof

US9484437B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9484437-B2
Application numberUS-201615018672-A
CountryUS
Kind codeB2
Filing dateFeb 8, 2016
Priority dateNov 15, 2013
Publication dateNov 1, 2016
Grant dateNov 1, 2016

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present invention discloses a lateral double diffused metal oxide semiconductor (LDMOS) device and a manufacturing method thereof. The LDMOS device includes: drift region, an isolation oxide region, a first oxide region, a second oxide region, a gate, a body region, a source, and a drain. The isolation oxide region, the first oxide region, and the second oxide region have an isolation thickness, a first thickness, and a second thickness respectively, wherein the second thickness is less than the first thickness. The present invention can reduce a conduction resistance without decreasing a breakdown voltage of the LDMOS device by the first oxidation region and the second oxidation region.

First claim

Opening claim text (preview).

What is claimed is: 1. A manufacturing method of a lateral double diffused metal oxide semiconductor (LDMOS) device, comprising: providing a substrate with a first conductive type; forming with a second conductive type a drift region on the substrate, wherein the second conductive type is opposite to the first conductive type; forming an isolation oxide region on the drift region to define an operation region, wherein the operation region is located in the drift region; forming a first oxide region on the drift region in the operation region having a first thickness; forming a second oxide region on the drift region in the operation region having a second thickness without affecting the first thickness of the first oxide region, wherein the second oxide region is directly connected to the first oxide region in a lateral direction, wherein the second thickness is less than the first thickness; forming a gate on the drift region in the operation region, which overlays at least part of the second oxide region and part of the first oxide region, including: forming a dielectric layer on the drift region, which is directly connected to the second oxide region in the lateral direction, wherein the second oxide region separates the dielectric layer and the first oxide region from each other; forming a stack layer on the dielectric layer; and forming a spacer layer over a side wall of the stack layer; forming a body region with a first conductive type in the drift region, and part of the body region is beneath the gate; forming a source with the second conductive type in the body region, wherein the spacer layer is located between the source and the stack layer from a top view; and forming a drain with the second conductive type in the drift region, which is located between the first oxide region and the isolation oxide region; wherein the first oxide region and the second oxide region are first and second local oxidation of silicon (LOCOS) structures respectively, and the isolation oxide region is a shallow trench isolation (STI) structure or a third local oxidation of silicon (LOCOS) structure; and wherein the isolation oxide region, the drain, the first oxide region, the second oxide region, and the dielectric layer are sequentially connected in the lateral direction. 2. The manufacturing method of claim 1 further comprising forming a body electrode with the second conductive type in the body region as an electrical contact of the body region. 3. A manufacturing method of a lateral double diffused metal oxide semiconductor (LDMOS) device, comprising: providing a substrate with a first conductive type; forming with a second conductive type a drift region on the substrate; forming an isolation oxide region on the drift region to define an operation region, wherein the operation region is located in the drift region; forming an oxide region on the drift region in the operation region having a first thickness by same process steps which form the isolation oxide region; defining a second oxide region in the oxide region by a mask layer; forming the second oxide region in the oxide region having a second thickness by an etching process, wherein a first oxide region is formed, which is a remaining not-etched portion of the oxide region, wherein the second oxide region is directly connected to the first oxide region in a lateral direction, wherein the second thickness is less than the first thickness; removing the mask layer; forming a gate on the drift region in the operation region, which overlays at least part of the second oxide region and part of the first oxide region, including: forming a dielectric layer on the drift region, which is directly connected to the second oxide region in the lateral direction, wherein the second oxide region separates the dielectric layer and the first oxide region from each other; forming a stack layer on the dielectric layer; and forming a spacer layer over a side wall of the stack layer; forming a body region with a first conductive type in the drift region, and part of the body region is beneath the gate; forming a source with the second conductive type in the body region, wherein the spacer layer is located between the source and the stack layer from a top view; and forming a drain with the second conductive type in the drift region, which is located between the first oxide region and the isolation oxide region; wherein the first oxide region and the isolation oxide region are shallow trench isolation (STI) structures, and the second oxide region is a local oxidation of silicon (LOCOS) structure; wherein the isolation oxide region, the drain, the first oxide region, the second oxide region, and the dielectric layer are sequentially connected in the lateral direction. 4. A manufacturing method of a lateral double diffused metal oxide semiconductor (LDMOS) device, comprising: providing a substrate with a first conductive type; forming with a second conductive type a drift region on the substrate, wherein the second conductive type is opposite to the first conductive type; forming an isolation oxide region on the drift region to define an operation region, wherein the operation region is located in the drift region; forming a first oxide region on the drift region in the operation region having a first thickness; forming a second oxide region on the drift region in the operation region having a second thickness without affecting the first thickness of the first oxide region, wherein the second oxide region is directly connected to the first oxide region in a lateral direction, wherein the second thickness is less than the first thickness; forming a gate on the drift region in the operation region, which overlays at least part of the second oxide region and part of the first oxide region, including: forming a dielectric layer on the drift region, which is directly connected to the second oxide region in the lateral direction, wherein the second oxide region separates the dielectric layer and the first oxide region from each other; forming a stack layer on the dielectric layer; and forming a spacer layer over a side wall of the stack layer; forming a body region with a first conductive type in the drift region, and part of the body region is beneath the gate; forming a source with the second conductive type in the body region, wherein the spacer layer is located between the source and the stack layer from a top view; and forming a drain with the second conductive type in the drift region, which is located between the first oxide region and the isolation oxide region; wherein the first oxide region is a shallow trench isolation (STI) structure, and the second oxide region and the isolation oxide region are local oxidation of silicon (LOCOS) structures; and wherein the isolation oxide region, the drain, the first oxide region, the second oxide region, and the dielectric layer are sequentially connected in the lateral direction.

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Classifications

  • comprising concurrently refilling multiple trenches having different shapes or dimensions · CPC title

  • formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI] · CPC title

  • using local oxidation of silicon [LOCOS] · CPC title

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What does patent US9484437B2 cover?
The present invention discloses a lateral double diffused metal oxide semiconductor (LDMOS) device and a manufacturing method thereof. The LDMOS device includes: drift region, an isolation oxide region, a first oxide region, a second oxide region, a gate, a body region, a source, and a drain. The isolation oxide region, the first oxide region, and the second oxide region have an isolation thick…
Who is the assignee on this patent?
Huang Tsung-Yi, Yang Ching-Yao, Liao wen-yi, and 3 more
What technology area does this patent fall under?
Primary CPC classification H10D30/65. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).