Semiconductor device and method of manufacturing the same
US-2015357264-A1 · Dec 10, 2015 · US
Semiconductor device and a method of manufacturing the same and a mounting structure of a semiconductor device
US9484288B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9484288-B2 |
| Application number | US-201514623032-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 16, 2015 |
| Priority date | Jun 30, 1999 |
| Publication date | Nov 1, 2016 |
| Grant date | Nov 1, 2016 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
The semiconductor device includes a tab including a chip supporting surface, and a back surface opposite to the chip supporting surface; a plurality of suspension leads supporting the tab; a plurality of leads arranged between the suspension leads; a semiconductor chip mounted on the chip supporting surface of the tab, the semiconductor chip including a main surface, a plurality of pads formed on the main surface, and a rear surface opposite to the main surface; a seal portion sealing the semiconductor chip such that a part of each of the leads is exposed from the seal portion; and a Pb-free solder formed on the part of each of the leads. A part of the rear surface of the semiconductor chip is contacted with the seal portion.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a die pad; a semiconductor chip disposed on the die pad, the semiconductor chip including a main surface on which a plurality of pads are formed; a plurality of suspension leads connected with the die pad; a plurality of leads arranged around the die pad in plan view and also arranged between the plurality of suspension leads in plan view; a plurality of wires electrically connecting the plurality of pads of the se…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9484288B2 cover?
- The semiconductor device includes a tab including a chip supporting surface, and a back surface opposite to the chip supporting surface; a plurality of suspension leads supporting the tab; a plurality of leads arranged between the suspension leads; a semiconductor chip mounted on the chip supporting surface of the tab, the semiconductor chip including a main surface, a plurality of pads formed …
- Who is the assignee on this patent?
- Renesas Electronics Corp, Renesas Semiconductor Package & Test Solutions Co Ltd, Renesas Tech Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W70/411. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).