Multilayer ceramic electronic component having a plurality of internal electrodes and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9484153-B2
Application number	US-201313779651-A
Country	US
Kind code	B2
Filing date	Feb 27, 2013
Priority date	Dec 20, 2012
Publication date	Nov 1, 2016
Grant date	Nov 1, 2016

Abstract

There is provided a multilayer ceramic electronic component including: a ceramic body including a plurality of dielectric layers; and a plurality of first and second internal electrodes disposed to face each other with the dielectric layer interposed therebetween within the ceramic body and having different widths, wherein three or more of the plurality of first and second internal electrodes form a single block, the blocks are iteratively laminated, and when the longest distance between the uppermost internal electrode and the lowermost internal electrode, among the plurality of first and second internal electrodes 121 and 122 , is T1 and the shortest distance therebetween is T2, 0.76≦T2/T1≦0.97 is satisfied.

First claim

What is claimed is:

1. A multilayer ceramic electronic component comprising:
a ceramic body including a plurality of dielectric layers; and
a plurality of first and second internal electrodes disposed to face each other with the dielectric layer interposed therebetween within the ceramic body and having different widths,
wherein three or more of the plurality of first and second internal electrodes form a single block,
a plurality of blocks are iteratively laminated, each block laminate being identical, and
the lowest internal electrode disposed in one block, among the plurality of first and second electrodes disposed in the one block, and the highest internal electrode disposed in the other block adjacent to the one block have the same width, and 0.76≦T2/T1≦0.97, where T1 is the greatest distance between the uppermost internal electrode and the lowermost internal electrode, among the plurality of first and second internal electrodes, and T2 is the shortest distance therebetween, in a cross-section taken in width-thickness (W-T) directions in a region of the ceramic body where the first and second internal electrodes overlap.

2. The multilayer ceramic electronic component of claim 1 , wherein an amount of the blocks is 5 or more.

3. The multilayer ceramic electronic component of claim 1 , wherein 0.85≦T2/T1≦0.90.

4. The multilayer ceramic electronic component of claim 1 , wherein a lamination amount of the plurality of first and second internal electrodes is 150 layers or more.

5. The multilayer ceramic electronic component of claim 1 , wherein the internal electrodes include one or more metals selected from the group consisting of palladium (Pd), a palladium-silver (Pd—Ag) alloy, nickel (Ni), and copper (Cu).

6. A method for manufacturing a multilayer ceramic electronic component, the method comprising:
preparing a plurality of ceramic green sheets with slurry including ceramic powder;
forming first and second internal electrode patterns having different widths with a conductive paste including a metal powder on the plurality of ceramic green sheets;
laminating three or more of the plurality of ceramic green sheets to form a plurality of block laminates; and
laminating the plurality of block laminates and firing the same to form a ceramic body including a plurality of first and second internal electrodes,
wherein each block laminate is identical,
the lowest internal electrode disposed in one block laminate and a highest internal electrode disposed in the other block laminate adjacent to the one block laminate, have the same width, and 0.76≦T2/T1≦0.97, where T1 is the greatest distance between the uppermost internal electrode and the lowermost internal electrode, among the plurality of first and second internal electrodes, within the ceramic body, and T2 is the shortest distance therebetween, in a cross-section taken in width-thickness (W-T) directions in a region of the ceramic body where the first and second internal electrodes overlap.

7. The method of claim 6 , further comprising: compressing the block laminates after the forming of the plurality of block laminates.

8. The method of claim 6 , wherein the first and second internal electrode patterns are disposed to have the same form within the respective blocks.

9. The method of claim 6 , wherein an amount of the block laminates is 5 or more.

10. The method of claim 6 , wherein 0.85≦T2/T1≦0.90.

11. The method of claim 6 , wherein a lamination amount of the plurality of first and second internal electrodes is 150 layers or more.

12. The method of claim 6 , wherein the metal powder includes one or more selected from the group consisting of palladium (Pd), a palladium-silver (Pd—Ag) alloy, nickel (Ni), and copper (Cu).

Assignees

• Samsung Electro Mech

Inventors

• Kim Hyung Joon

Classifications

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/0085

  Fried electrodes · CPC title

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title