Amplifier circuit and operation method thereof

US9479119B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9479119-B2
Application numberUS-201314650259-A
CountryUS
Kind codeB2
Filing dateNov 8, 2013
Priority dateDec 7, 2012
Publication dateOct 25, 2016
Grant dateOct 25, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Disclosed is an amplifier circuit capable of achieving high efficiency at back off power while maintaining high output power when an amplifier of a driving stage is saturated in a multistage amplifier in which a plurality of amplifiers are connected in series to each other. In the amplifier circuit, at least two amplifiers including a first amplifier and a second amplifier, the first amplifier preceding the second the first amplifier, are connected in series to each other, the second amplifier changes input impedance according to output power from the first amplifier, and an impedance adjusting unit for adjusting output load impedance of the first amplifier is disposed between the first amplifier and the second amplifier, wherein the impedance adjusting unit optimizes the output load impedance of the first amplifier according to a change of input impedance of the second amplifier.

First claim

Opening claim text (preview).

The invention claimed is: 1. An amplifier circuit comprising: at least two amplifiers including a first amplifier and a second amplifier, the first amplifier preceding the second amplifier; and an impedance adjusting unit disposed between the first amplifier and the second amplifier, and configured to: adjust an output load impedance of the first amplifier, and adjust a phase of a signal output from the adjusted output load impedance, wherein the second amplifier is configured to change input impedance according to an output power from the first amplifier, and wherein the impedance adjusting unit is configured to adjust the output load impedance of the first amplifier according to a change of input impedance of the second amplifier. 2. The amplifier circuit according to claim 1 , wherein the impedance adjusting unit is configured to adjust the output load impedance of the first amplifier such that high-power load matching is done based on a first amplifier outputting high power and high-efficient load matching is done based on a first amplifier outputting back-off power. 3. The amplifier circuit according to claim 1 , wherein the impedance adjusting unit comprises a matching circuit configured to match the output load impedance of the first amplifier with the input impedance of the second amplifier. 4. The amplifier circuit according to claim 1 , wherein the impedance adjusting unit comprises a phase adjusting unit configured to adjust a phase of a signal output from a matching circuit. 5. The amplifier circuit according to claim 1 , wherein the second amplifier is a Doherty amplifier. 6. The amplifier circuit according to claim 1 , wherein the second amplifier is an envelope tracking amplifier. 7. The amplifier circuit according to claim 1 , wherein the amplifier circuit is included in a communication apparatus. 8. A method of operating an amplifier circuit, the method comprising: adjusting, at an impedance adjusting unit disposed between a first amplifier and a second amplifier, an output load impedance of the first amplifier; adjusting a phase of a signal output from the adjusted output load impedance; changing, by the second amplifier, an input impedance according to output power from the first amplifier; and adjusting, by the impedance adjusting unit, an output load impedance of the first amplifier according to a change of input impedance of the second amplifier, wherein the first amplifier precedes the second amplifier. 9. The method according to claim 8 , wherein the impedance adjusting unit adjusts the output load impedance of the first amplifier such that high-power load matching is done when a first amplifier outputs high power and high-efficient load matching is done when a first amplifier outputs back off power. 10. The method according to claim 8 , wherein the impedance adjusting unit comprises a matching circuit configured to match the output load impedance of the first amplifier with the input impedance of the second amplifier. 11. The method according to claim 8 , wherein the impedance adjusting unit comprises a phase adjusting unit configured to adjust a phase of a signal output from a matching circuit. 12. The method according to claim 8 , wherein the second amplifier is a Doherty amplifier. 13. The method according to claim 8 , wherein the second amplifier is an envelope tracking amplifier. 14. The method according to claim 8 , wherein the amplifier circuit is included in a communication apparatus. 15. A wireless communication apparatus comprising: a first amplifier; a second amplifier, the first amplifier preceding the second amplifier; and an impedance adjusting unit disposed between the first amplifier and the second amplifier, and configured to: adjust an output load impedance of the first amplifier, and adjust a phase of a signal output from the adjusted output load impedance, wherein the second amplifier is configured to change input impedance according to an output power from the first amplifier, and wherein the impedance adjusting unit is configured to adjust the output load impedance and a phase of the first amplifier according to a change of input impedance of the second amplifier. 16. The wireless communication apparatus according to claim 15 , wherein the impedance adjusting unit is configured to adjust the output load impedance of the first amplifier such that high-power load matching is done based on a first amplifier outputting high power and high-efficient load matching is done based on a first amplifier outputting back-off power. 17. The wireless communication apparatus according to claim 15 , wherein the impedance adjusting unit comprises a matching circuit configured to match the output load impedance of the first amplifier with the input impedance of the second amplifier. 18. The wireless communication apparatus according to claim 15 , wherein the impedance adjusting unit comprises a phase adjusting unit configured to adjust a phase of a signal output from a matching circuit. 19. The wireless communication apparatus according to claim 15 , wherein the second amplifier is a Doherty amplifier. 20. The wireless communication apparatus according to claim 15 , wherein the second amplifier is an envelope tracking amplifier.

Assignees

Inventors

Classifications

  • with semiconductor devices only · CPC title

  • Modifications of input or output impedances, not otherwise provided for · CPC title

  • Arrangements for impedance matching · CPC title

  • H03F1/0288Primary

    using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

  • An input signal being distributed in parallel over the inputs of a plurality of power amplifiers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9479119B2 cover?
Disclosed is an amplifier circuit capable of achieving high efficiency at back off power while maintaining high output power when an amplifier of a driving stage is saturated in a multistage amplifier in which a plurality of amplifiers are connected in series to each other. In the amplifier circuit, at least two amplifiers including a first amplifier and a second amplifier, the first amplifier …
Who is the assignee on this patent?
Samsung Electronics Co Ltd, Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03F1/0288. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).