Read operation for a non-volatile memory

Patent metadata

Field	Value
Publication number	US-9478292-B2
Application number	US-201414525076-A
Country	US
Kind code	B2
Filing date	Oct 27, 2014
Priority date	Oct 27, 2013
Publication date	Oct 25, 2016
Grant date	Oct 25, 2016

Abstract

Apparatuses, systems, and methods are disclosed for a read operation for a non-volatile memory. A method includes determining whether one or more non-volatile storage cells satisfy a predefined condition. A method includes preparing the one or more non-volatile storage cells for use prior to satisfying a read request from a storage client using the one or more non-volatile storage cells in response to determining that a predefined condition is satisfied.

First claim

What is claimed is:

1. A method comprising:
determining that one or more non-volatile storage cells satisfy a predefined condition comprising one or more of the one or more non-volatile storage cells being unpowered for at least a predefined period of time, a power down for the one or more non-volatile storage cells, a power up for the one or more non-volatile storage cells, a temperature threshold, a partially written erase block condition, and an error rate for the one or more non-volatile storage cells satisfying a threshold; and
preparing the one or more non-volatile storage cells for use prior to satisfying a read request from a storage client using the one or more non-volatile storage cells in response to determining the one or more non-volatile storage cells satisfy the predefined condition.

2. The method of claim 1 , wherein preparing the one or more non-volatile storage cells comprises adjusting a stored voltage level of the one or more non-volatile storage cells.

3. The method of claim 2 , wherein the stored voltage level of the one or more non-volatile storage cells is adjusted by performing one or more read operations which disturb the stored voltage level of the one or more non-volatile storage cells.

4. The method of claim 3 , wherein the one or more read operations are performed on one or more target storage cells adjacent to the one or more non-volatile storage cells such that the stored voltage level of the one or more non-volatile storage cells is adjusted in response to the one or more read operations.

5. The method of claim 3 , further comprising discarding data from the one or more read operations, wherein discarding the data comprises one or more of ignoring the data, interrupting transmission of the data, deleting the data from a memory buffer, overwriting the data in a memory buffer, and bypassing an error-correcting code (ECC) decoder for the data.

6. The method of claim 3 , further comprising adjusting one or more read voltage thresholds for the one or more non-volatile storage cells.

7. The method of claim 6 , wherein the predefined condition comprises a target read voltage threshold being between default read voltage threshold adjustment levels for the one or more non-volatile storage cells.

8. The method of claim 1 , wherein the predefined condition is associated with a decrease in a stored voltage level of the one or more non-volatile storage cells.

9. The method of claim 1 , wherein the one or more non-volatile storage cells comprise one or more pages of an erase block and the predefined condition comprises only a subset of the erase block being programmed prior to being powered down, the one or more pages comprising at least a last programmed page of the erase block.

10. The method of claim 9 , further comprising selecting the one or more storage cells based on an indicator indicating that only the subset of the erase block was programmed prior to being powered down.

11. The method of claim 9 , further comprising selecting the one or more storage cells in response to scanning the erase block to determine that only the subset of the erase block was programmed prior to being powered down.

12. An apparatus comprising:
a status module configured to detect that a non-volatile recording device is powered on after being powered down;
a read module configured to perform one or more read operations on at least one page of the non-volatile recording device without transmitting data from the one or more read operations to a storage client, the read module performing the one or more read operations in response to the status module determining that the non-volatile recording device is powered on; and
a read result module configured to disregard the data from the one or more read operations by one or more of ignoring the data, interrupting transmission of the data, deleting the data from a read buffer, overwriting the data in a read buffer, and bypassing an error-correcting code (ECC) decoder for the read data.

13. The apparatus of claim 12 , further comprising a target module configured to select the at least one page of the non-volatile recording device for performing the one or more read operations based on one or more of a page architecture for the non-volatile recording device, an addressing scheme for the non-volatile recording device, and a physical cell geometry for the non-volatile recording device.

14. The apparatus of claim 12 , further comprising a read threshold management module configured to adjust one or more read voltage thresholds for the at least one page in response to the non-volatile recording device being powered on, the one or more read operations of the read module configured to adjust one or more stored read voltage levels of the at least one page relative to the adjusted one or more read voltage thresholds.

15. The apparatus of claim 12 , wherein the read module is configured to select the at least one page from an erase block, the erase block being partially programmed with data prior to the non-volatile recording device being powered down.

Assignees

• Fusion-Io Inc
• Sandisk Technologies Llc

Inventors

• Sun Hairong
• Hyun Jea
• Wood Robert

Classifications

• G11C16/10 Primary

  Programming or data input circuits · CPC title

• G11C11/5635 Primary

  Erasing circuits · CPC title

• G11C16/14

  Circuits for erasing electrically, e.g. erase voltage switching circuits · CPC title

• G11C16/3495

  Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically · CPC title

• G11C16/225

  Preventing erasure, programming or reading when power supply voltages are outside the required ranges · CPC title