Cross-point memory device including multi-level cells and operating method thereof

Patent metadata

Field	Value
Publication number	US-9478285-B2
Application number	US-201514800060-A
Country	US
Kind code	B2
Filing date	Jul 15, 2015
Priority date	Nov 24, 2014
Publication date	Oct 25, 2016
Grant date	Oct 25, 2016

Abstract

A method of operating a cross-point memory device, having an array of multilevel cells, includes performing a first reading operation with respect to the multilevel cells through a plurality of sensing operations to determine a first state and performing a second reading operation with respect to the multilevel cells through a plurality of sensing operations to determine a second state. A difference between a level of a first voltage used in a first sensing operation and a level of a second voltage used in a second sensing operation in the first reading operation is different from a difference between a level of a third voltage used in a first sensing operation and a level of a fourth voltage used in a second sensing operation in the second reading operation.

First claim

What is claimed is:

1. A method of operating a cross-point memory device comprising a memory cell array comprising multilevel cells, the method comprising:
performing a first reading operation with respect to the multilevel cells through a plurality of sensing operations to determine a first state; and
performing a second reading operation with respect to the multilevel cells through a plurality of sensing operations to determine a second state, wherein
a difference between a level of a first voltage used in a first sensing operation and a level of a second voltage used in a second sensing operation in the first reading operation is different from a difference between a level of a third voltage used in a first sensing operation and a level of a fourth voltage used in a second sensing operation in the second reading operation.

2. The method of claim 1 , wherein the first through fourth voltages respectively indicate potential differences that are applied to both ends of the multilevel cell.

3. The method of claim 1 , wherein each of the first through fourth voltages is a voltage that is provided to a bitline connected to the multilevel cells.

4. The method of claim 1 , wherein:
each of the first and second reading operations comprises:
comparing a voltage of a sensing node generated by data stored in the multilevel cell with a first reference voltage, and
comparing another voltage of the sensing node generated by the data stored in the multilevel cell with a second reference voltage,

the first voltage is the first reference voltage of the first reading operation, the second voltage is the second reference voltage of the first reading operation, the third voltage is the first reference voltage of the second reading operation, and the fourth voltage is the second reference voltage of the second reading operation, and
the first through fourth voltages all have different voltage levels from one another.

5. The method of claim 1 , further comprising:
performing a third reading operation with respect to the multilevel cells through a plurality of sensing operations to determine a third state, wherein
a difference between a level of a fifth voltage used in a first sensing operation and a level of a sixth voltage used in a second sensing operation in the third reading operation is different from the difference between the levels of the first and second voltages.

6. The method of claim 1 , wherein a distribution width of multilevel cells having the first state is relatively narrow, and a distribution width of multilevel cells having the second state is relatively wide.

7. The method of claim 6 , wherein:
the second voltage is higher than the first voltage by a first variation, and the fourth voltage is higher than the third voltage by a second variation, and
the first variation is lower than the second variation.

8. The method of claim 1 , wherein:
the multilevel cells are arrayed in an area where a plurality of wordlines cross a plurality of bitlines, and
in each of the first and second reading operations, reading is simultaneously performed with respect to multilevel cells that are arrayed in an area where one wordline crosses a plurality of bitlines.

9. The method of claim 8 , wherein in the first reading operation, N multilevel cells (wherein N is an integer higher than or equal to 2) are simultaneously sensed through the first sensing operation, and the second sensing operation is selectively performed with respect to multilevel cells that are not determined in the first state in the first sensing operation.

10. The method of claim 1 , wherein the number of sensing operations performed in the first reading operation is different from the number of sensing operations performed in the second reading operation.

11. A method of operating a cross-point memory device comprising a memory cell array comprising multilevel cells, the method comprising:
performing a first sensing operation with respect to a plurality of multilevel cells by using a read factor instructing a first target resistance to determine a first state;
performing a second sensing operation with respect to one or more multilevel cells by using the read factor instructing a second target resistance to determine the first state;
performing a third sensing operation with respect to a plurality of multilevel cells by using the read factor instructing a third target resistance to determine a second state; and
performing a fourth sensing operation with respect to one or more multilevel cells by using the read factor instructing a fourth target resistance to determine the second state, wherein
a first resistance difference between the first and second target resistances is different from a second resistance difference between the third and fourth target resistances.

12. The method of claim 11 , wherein:
a distribution width of multilevel cells having the first state is relatively narrow, and a distribution width of multilevel cells having the second state is relatively wide, and
the second resistance difference is greater than the first resistance difference.

13. The method of claim 12 , wherein the read factor indicates a potential difference that is applied to both ends of each of the multilevel cells.

14. The method of claim 12 , wherein the read factor is one of a reference voltage and a reference current that are used in a sensing operation.

15. The method of claim 12 , wherein the read factor is a sensing timing indicating an enable timing of a sense amplifier circuit that compares a voltage of a sensing node with a reference voltage.

16. The method of claim 11 , further comprising:
determining the number of errors detected from read data; and
changing a value of at least one selected from the first through fourth target resistances according to the determination result.

17. A method of operating a memory system comprising a cross-point memory device and a memory controller, the method comprising:
setting first and second read conditions used in a first reading operation for determining a first state; and
setting third and fourth read conditions used in a second reading operation for determining a second state, wherein
a first variation corresponding to a difference between a value of a read factor of the first read condition and a value of a read factor of the second read condition is different from a second variation corresponding to a difference between a value of a read factor of the third read condition and a value of a read factor of the fourth read condition.

18. The method of claim 17 , further comprising:
performing a first sensing operation with respect to a plurality of multilevel cells by using the first read condition; and
selectively performing a second sensing operation with respect to other multilevel cells except multilevel cells determined in the first state through the first sensing operation, by using the second read condition.

19. The method of claim 18 , further comprising:
performing a third sensing operation with respect to a plurality of multilevel cells by using the third read condition; and
selectively performing a fourth sensing operation with respect to other multilevel cells except multilevel cells determined in the second state through the third sensing operation, by using the fourth read condition.

20. The method of claim 17 , wherein values of the first and second variations are respectively set according to widths of resistance level distributions of the first and second states.

Assignees

• Park Hyun-Kook
• Yoon Chi-Weon
• Byeon Dae-Seok
• Samsung Electronics Co Ltd

Inventors

• Park Hyun-Kook
• Yoon Chi-Weon
• Byeon Dae-Seok

Classifications

• G11C13/0002

  using resistive RAM [RRAM] elements · CPC title

• G11C11/5642

  Sensing or reading circuits; Data output circuits · CPC title

• G11C11/1673

  Reading or sensing circuits or methods · CPC title

• G11C11/56

  using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency · CPC title

• G11C11/5607

  using magnetic storage elements · CPC title