Memory hierarchy using row-based compression

Patent metadata

Field	Value
Publication number	US-9477605-B2
Application number	US-201313939377-A
Country	US
Kind code	B2
Filing date	Jul 11, 2013
Priority date	Jul 11, 2013
Publication date	Oct 25, 2016
Grant date	Oct 25, 2016

Abstract

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

First claim

What is claimed is:

1. A system comprising:
a device coupleable to a first memory, the device comprising:
a second memory to cache data from the first memory, the second memory comprising:
a plurality of rows, each row comprising a corresponding set of a plurality of compressed data blocks of non-uniform sizes and a corresponding set of a plurality of tag blocks, each tag block representing a corresponding compressed data block of the row and comprising a size indicator and an address value for the corresponding compressed data block;
control logic to, in response to a memory access request to the device, identify a compressed data block of the set of the plurality of compressed data blocks as storing requested data based on the address values of the set of the plurality of tag blocks of the row, identify a location of the compressed data block in the row based on the size indicators of the tag blocks, and access the identified compressed data block from the identified location; and
decompression logic to decompress data blocks accessed from the second memory.

2. The system of claim 1 , wherein the device further comprises:
compression logic to compress data blocks to be stored in the second memory.

3. The system of claim 1 , further comprising:
the first memory, wherein the first memory comprises a non-volatile memory; and
wherein the second memory comprises a volatile memory.

4. The system of claim 1 , wherein:
the device comprises an integrated circuit (IC) package comprising the second memory and a processor; and
the first memory comprises a memory device external to the IC package.

5. The system of claim 1 , wherein:
the memory access request comprises a modify request; and
the control logic further is to modify a decompressed version of the compressed data block based on the modify request to generate a modified data block, compress the modified data block to generate a compressed modified data block, store the compressed modified data block to the row as a compressed data block of the set of the plurality of compressed data blocks, and store a tag block associated with the compressed modified data block to the row as a tag block of the set of the plurality of tag blocks, the stored tag block comprising a size indicator of the compressed modified data block.

6. The system of claim 5 wherein the control logic comprises:
shuffle/compact logic to shuffle a location of at least one other compressed data block in the row to create a space in the row for the compressed modified data block.

7. The system of claim 1 , wherein the control logic further is to provide the accessed compressed data block for storage at the first memory.

8. The system of claim 7 , further comprising:
the first memory, wherein the first memory comprises:
decompression logic to decompress the accessed compressed data block to generate a decompressed data block for storage at the first memory.

9. The system of claim 8 , wherein the first memory further comprises:
compression logic to compress a data block accessed from the first memory prior to transfer of the data block to the device.

10. A method comprising:
storing, at a row of a first memory, a set of a plurality of compressed data blocks of non-uniform sizes and a set of a plurality of tag blocks, each tag block representing a corresponding compressed data block of the row and comprising a size indicator for the corresponding compressed data block and an address value associated with the compressed data block; and
in response to a memory access request:
identifying a compressed data block of the set of the plurality of compressed data blocks as storing requested data based on the address values of the set of the plurality of tag blocks of the row:
identifying a location of the compressed data block in the row based on the size indicators of the tag blocks; and
accessing the compressed data block from the identified location.

11. The method of claim 10 , further comprising:
decompressing the accessed compressed data block to generate a decompressed data block.

12. The method of claim 11 , further comprising:
providing the decompressed data block for storage at a second memory.

13. The method of claim 10 , further comprising:
transmitting the accessed compressed data block to a second memory for storage.

14. The method of claim 13 , further comprising:
decompressing, at the second memory, the accessed compressed data block to generate a decompressed data block; and
storing the decompressed data block at a memory array of the second memory.

15. The method of claim 13 , further comprising:
determining a current offset for a row of the second memory based on a previous offset used to previously store a compressed data block at the row; and
storing the accessed compressed data block at a location of the row based on the current offset.

16. A non-transitory computer readable storage medium embodying a set of executable instructions, the set of executable instructions to manipulate a computer system to perform a portion of a process to fabricate at least part of a device, the device coupleable to a first memory and comprising:
a second memory to cache data from the first memory, the second memory comprising:
a plurality of rows, each row comprising a corresponding set of a plurality of compressed data blocks of non-uniform sizes and a corresponding set of a plurality of tag blocks, each tag block representing a corresponding compressed data block of the row and comprising a size indicator for the corresponding compressed data block and an address value associated with the compressed data block;
control logic to, in response to a memory access request to the device, identify a compressed data block of the set of the plurality of compressed data blocks as storing requested data based on the address values of the set of the plurality of tag blocks of the row, identify a location of the compressed data block in the row based on the size indicators of the tag blocks, and access the identified compressed data block from the identified location; and
decompression logic to decompress data blocks accessed from the second memory.

17. The non-transitory computer readable storage medium of claim 16 , wherein:
the memory access request comprises a modify request; and
the control logic further is to modify a decompressed version of the compressed data block based on the modify request to generate a modified data block, compress the modified data block to generate a compressed modified data block, store the compressed modified data block to the row as a compressed data block of the set of the plurality of compressed data blocks, and store a tag block associated with the compressed modified data block to the row as a tag block of the set of the plurality of tag blocks, the stored tag block comprising a size indicator of the compressed modified data block.

18. The non-transitory computer readable storage medium of claim 17 , wherein the control logic further is to provide the accessed compressed data block for storage at the first memory.

19. The non-transitory computer readable storage medium of claim 18 , wherein the device further comprises:
the first memory, wherein the first memory comprises:
decompression logic to decompress the accessed compressed data block to generate a decompressed data block for storage at the first memory.

20. The non-transitory computer readable storage medium of claim 19 , wherein the first memory further comprises:

Assignees

• Advanced Micro Devices Inc

Inventors

• Loh Gabriel H
• O'Connor James M

Classifications

• G06F12/0895

  of parts of caches, e.g. directory or tag array · CPC title

• G06F2212/1024

  Latency reduction · CPC title

• G06F2212/401

  Compressed data · CPC title

• G06F2212/1036

  Life time enhancement · CPC title

• G06F12/0866 Primary

  for peripheral storage systems, e.g. disk cache · CPC title