Locating data in non-volatile memory

US9477406B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9477406-B2
Application numberUS-201514700694-A
CountryUS
Kind codeB2
Filing dateApr 30, 2015
Priority dateJan 22, 2013
Publication dateOct 25, 2016
Grant dateOct 25, 2016

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  1. Title

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Abstract

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Systems and methods presented herein provide for locating data in non-volatile memory by decoupling a mapping unit size from restrictions such as the maximum size of a reducible unit to provide efficient mapping of larger mapping units. In one embodiment, a method comprises mapping a logical page address in a logical block address space to a read unit address and a number of read units in the non-volatile memory. The method also comprises mapping data of the logical page address to a plurality of variable-sized pieces of data spread across the number of read units starting at the read unit address in the non-volatile memory.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of mapping data in non-volatile memory of a solid state drive, the method comprising: mapping variable-sized pieces of compressed data across a plurality of read units, wherein each read unit corresponds to a portion of storage space in the non-volatile memory, wherein a first of the variable-sized pieces of compressed data resides in a first and a second of the read units, and wherein each read unit is individually correctable using an error correction code; flagging the first read unit to indicate that a portion of the first variable-sized piece of compressed data resides in the second read unit; mapping the plurality of read units to a read unit address; and mapping the read unit address to a logical block address in the non-volatile memory to access the compressed data. 2. The method of claim 1 , wherein: the first variable-sized piece of compressed data further resides in a portion of a third of the read units; and the method further comprises flagging the second unit to indicate that another portion of the first variable-sized piece of compressed data resides in the third read unit. 3. The method of claim 2 , further comprising: flagging the third read unit to indicate where the first variable-sized piece of compressed data ends in the third read unit. 4. The method of claim 1 , further comprising: flagging the second read unit to indicate where the first variable-sized piece of compressed data ends in the second read unit. 5. The method of claim 1 , wherein: the first read unit comprises a header that includes a length of the variable-sized pieces of compressed data in bytes for a logical page at the logical block address. 6. A method of reading data from non-volatile memory of a solid state drive, the method comprising: accessing a mapping unit via a logical block address; locating a read unit address, from the mapping unit, where a plurality of read units reside in the non-volatile memory; locating variable-sized pieces of compressed data across the read units at the read unit address, determining that a first of the variable-sized pieces of compressed data resides in a first and a second of the read units based on a flag in the first read unit; retrieving the first variable-sized piece of compressed data from the read units; and decompressing the first variable-sized piece of compressed data, wherein each of the read units comprises user data and error correction data, wherein each of the read units is correctable based on its error correction data. 7. The method of claim 6 , further comprising: decompressing the remaining variable-sized pieces of compressed data to reconstruct of a logical page of the non-volatile memory. 8. The method of claim 6 , further comprising: correcting errors in the user data of at least one of the read units via the error correction data. 9. The method of claim 6 , further comprising: determining that another portion of the first variable-sized piece of compressed data resides in a third of the read units based on a flag in the second read unit. 10. The method of claim 9 , further comprising: reading a flag in the third read unit to determine where the first variable-sized piece of compressed data ends in the third read unit. 11. The method of claim 6 , further comprising: reading a flag in the second read unit to determine where the first variable-sized piece of compressed data ends in the second read unit. 12. A solid state drive, comprising: a non-volatile memory comprising a plurality of logical pages; and a mapping module operable to map variable-sized pieces of compressed data across a plurality of read units in the non-volatile memory, wherein a first of the variable-sized pieces of compressed data resides in a first and a second of the read units wherein each read unit is individually correctable using an error correction code, and wherein the mapping module is further operable to flag the first read unit to indicate that a portion of the first variable-sized piece of compressed data resides in the second read unit, to map the plurality of read units to a read unit address, and to map the read unit address to a logical block address in the non-volatile memory for accessing the compressed data and reconstructing a first of the logical pages. 13. The memory system of claim 12 , wherein: the first variable-sized piece of compressed data further resides in a portion of a third of the read units. 14. The memory system of claim 12 , wherein: the second read unit comprises a flag to determine where the first variable-sized piece of compressed data ends in the second read unit. 15. The memory system of claim 12 , wherein: the second read unit comprises a flag to indicate that a portion of the first variable-sized piece of compressed data resides in a third read unit.

Assignees

Inventors

Classifications

  • in block erasable memory, e.g. flash memory · CPC title

  • Non-volatile memory · CPC title

  • Management of blocks · CPC title

  • Space efficiency improvement · CPC title

  • G06F3/0608Primary

    Saving storage space on storage systems · CPC title

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What does patent US9477406B2 cover?
Systems and methods presented herein provide for locating data in non-volatile memory by decoupling a mapping unit size from restrictions such as the maximum size of a reducible unit to provide efficient mapping of larger mapping units. In one embodiment, a method comprises mapping a logical page address in a logical block address space to a read unit address and a number of read units in the n…
Who is the assignee on this patent?
Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification G06F12/0246. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).