Linear regulator with improved power supply ripple rejection

Patent metadata

Field	Value
Publication number	US-9477244-B2
Application number	US-201414381186-A
Country	US
Kind code	B2
Filing date	Jan 10, 2014
Priority date	Jan 10, 2014
Publication date	Oct 25, 2016
Grant date	Oct 25, 2016

Abstract

Embodiments of the invention are generally directed to a linear regulator with improved power supply ripple rejection. An embodiment of an apparatus includes an linear regulator to receive a system power supply and to generate a regulated power supply; a first voltage reference generator to generate a first voltage reference for the linear regulator; a second voltage reference generator to generate a second voltage reference for the linear regulator; and a voltage reference and power switcher. In some embodiments, the voltage reference and power switcher is to switch a voltage reference for the linear regulator from the first voltage reference to the second voltage reference and is to switch a part of a power supply for the linear regulator from the system power supply to the regulated power supply.

First claim

What is claimed is:

1. An apparatus comprising:
a linear regulator to receive a system power supply and to generate a regulated power supply, the linear regulator comprising an error amplifier;
a first voltage reference generator to generate a first voltage reference for the linear regulator;
a second voltage reference generator to generate a second voltage reference for the linear regulator; and
a voltage reference and power switcher;
wherein the voltage reference and power switcher is to switch a voltage reference for the linear regulator from the first voltage reference to the second voltage reference and is to switch a power supply for the error amplifier of the linear regulator from the system power supply to the regulated power supply.

2. The apparatus of claim 1 , wherein the voltage reference and power switcher is to switch the voltage reference and the power supply at a same time.

3. The apparatus of claim 1 , wherein the voltage reference and power switcher are to disable the first voltage reference upon switching to the second voltage reference.

4. The apparatus of claim 1 , wherein the first voltage reference generator is powered by the system power supply.

5. The apparatus of claim 1 , wherein the second voltage reference generator is powered by the regulated power supply.

6. The apparatus of claim 1 , wherein the voltage reference and power switcher includes a differential pair of transistors, wherein a first transistor of the differential pair of transistors receives a first bias voltage generated by the first voltage reference generator and a second transistor of the differential pair of transistors receivers a second bias voltage generated by the second voltage reference generator.

7. The apparatus of claim 6 , wherein the switching of the voltage reference and power switcher includes switching being caused when the second bias voltage is greater than the first bias voltage.

8. The apparatus of claim 1 , wherein the first voltage reference generator includes a first current source and the second voltage reference generator includes a second current source, the first current source being enabled prior to the second current source when the apparatus is enabled.

9. The apparatus of claim 8 , wherein the first current source is enabled when the first voltage reference generator receives the system power supply and the second current source is enabled when the second reference generator receives the regulated power supply.

10. A method comprising:
initializing a voltage regulator circuit;
generating a first voltage reference by a first voltage reference generator;
providing the first voltage reference to a linear regulator, the linear regulator comprising an error amplifier and receiving a system power supply voltage;
generating a regulated power supply voltage by the linear regulator;
providing the regulated power supply voltage to the second voltage reference generator;
generating a second voltage reference by the second voltage reference generator; and
switching a voltage reference for the linear regulator from the first voltage reference to the second voltage reference and switching a power supply for the error amplifier of the linear regulator from the system power supply to the regulated power supply.

11. The method of claim 10 , wherein the switching of the voltage reference for the linear regulator and the switching of the power supply for the error amplifier of the linear regulator are performed simultaneously.

12. The method of claim 10 , wherein switching a voltage reference for the linear regulator from the first voltage reference to the second voltage reference further includes disabling the first voltage reference.

13. The method of claim 10 , further comprising generating a first bias voltage by the first voltage reference generator and generating a second bias voltage by the second voltage reference generator.

14. The method of claim 12 , wherein the switching of the voltage reference for the linear regulator and the switching of the power supply for the error amplifier of the linear regulator occurs upon the second bias voltage being greater than the first bias voltage.

15. The method of claim 14 , further comprising generating a first current by a first current source of the first voltage reference generator and generating a second current by a second current source of the second voltage reference generator, the generation of the first current occurring prior to the generation of the second current.

16. A circuit to provide a voltage reference comprising:
a first circuit portion to provide a first reference for a linear regulator, the linear regulator to receive a system power supply voltage and to generate a regulated power supply voltage, the first circuit portion including a connection to the system power supply voltage;
a second circuit portion to provide a second reference for the linear regulator, the second circuit portion including a connection to the regulated power supply voltage; and
a third circuit portion to provide switching between the first reference produced by the first circuit portion and the second reference produced by the second circuit portion for a linear regulator and to provide switching of a power supply to an error amplifier of the linear regulator between the system power supply voltage and the regulated power supply voltage.

17. The circuit of claim 16 , wherein the third circuit portion includes:
a differential pair of transistors including a first differential transistor and a second differential transistor; and
a resistor coupled to the differential pair of transistors.

18. The circuit of claim 17 , wherein the first differential transistor receives a first bias voltage generated by the first circuit portion and the second differential transistor receives a second bias voltage generated by the second circuit portion.

19. The circuit of claim 18 , wherein the differential pair of transistors switches from the first reference voltage to the second reference voltage when the second bias voltage is greater than the first bias voltage.

20. The circuit of claim 16 , wherein the first circuit portion includes a first current source and the second circuit portion includes a second current source, the first current source being enabled prior to the second current source being enabled when the circuit is enabled.

21. The circuit of claim 20 , wherein the first current source is enabled when the first circuit portion receives the system power supply voltage and the second current source is enabled when the second circuit portion receives the regulated power supply voltage.

22. The circuit of claim 16 , wherein switching between the first reference produced by the first circuit portion and the second reference produced by the second circuit portion further includes disabling the first reference.

Assignees

• Lattice Semiconductor Corp

Inventors

• Luo Kexin
• Chu Fangqing
• Shen Yu
• Wu Zhi
• Lee Inyeol

Classifications

• G05F1/56

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• G05F1/468 Primary

  characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title