Adaptive low-power zero-cross comparator for discontinuous current mode operated switching mode power supply

US9473029B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9473029-B2
Application numberUS-201313895575-A
CountryUS
Kind codeB2
Filing dateMay 16, 2013
Priority dateMay 15, 2013
Publication dateOct 18, 2016
Grant dateOct 18, 2016

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Abstract

Official abstract text for this publication.

A time off estimator and an adaptive controller implemented on an integrated circuit to emulate current dependent zero crossing circuitry to permit improved performance of a buck type switching mode power supply. The time off estimator circuit is enhanced by an automatic correction circuit for the timing of a zero crossing where energy to a reference capacitor returns to zero and is turned off awaiting the next cycle where the capacitor is again charged and discharged.

First claim

Opening claim text (preview).

What is claimed is: 1. A switching mode power supply (SMPS), comprising: a) a time off estimator to predict a time when a flow of energy is turned off in a clock cycle; b) a reactive element of the SMPS charged and then discharged; c) an adaptive controller configured to sense overshoot or undershoot of power signal in the reactive element and adjust a reference offset voltage; and d) said reference offset voltage connected to a first input of a compare circuit to establish a turn off setting to avoid power signal spikes caused by a turn off time being too long or energy being terminated too soon caused by the turn off time being too short. 2. The power supply of claim 1 , wherein a PMOS transistor connects a first voltage dependent current source to a second voltage dependent current source and a second input of the compare circuit. 3. The power supply of claim 1 , wherein the adaptive controller comprises a digitally controlled zero crossing comparator automatic correction circuit. 4. The power supply of claim 3 , wherein said digitally controlled zero crossing comparator comprises a down comparator, which compares an input voltage plus an offset voltage to a power supply node voltage, and an up comparator, which compares said node voltage said offset voltage, to control the up and down digital counter to control an offset voltage to a reference capacitor. 5. A method for controlling a power supply, comprising: a) forming an adaptive controller to detect overshoot or undershoot of a power signal in a reactive element of a switching mode power supply; b) adjusting a reference offset voltage; c) forming a time off estimator that predicts when energy flow to said power supply is turned off in a clock cycle; and d) predicting a time when energy flow in said switching mode power supply is turned off to said reactive element for each cycle of charging and discharging of said reactive element. 6. The method of claim 5 , wherein said time off prediction comprises a first voltage dependent current source that is controlled by an input voltage and a second voltage dependent current source that is controlled by an output voltage. 7. The method of claim 5 , wherein the adaptive controller comprises a digitally controlled zero crossing comparator automatic correction circuit. 8. The method of claim 7 , wherein said digitally controlled zero crossing comparator comprises an up and down comparator to drive a digital up and down counter to control variables of in said estimator.

Assignees

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Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H02M3/1588Primary

    comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence) · CPC title

  • Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero · CPC title

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What does patent US9473029B2 cover?
A time off estimator and an adaptive controller implemented on an integrated circuit to emulate current dependent zero crossing circuitry to permit improved performance of a buck type switching mode power supply. The time off estimator circuit is enhanced by an automatic correction circuit for the timing of a zero crossing where energy to a reference capacitor returns to zero and is turned off …
Who is the assignee on this patent?
Dialog Semiconductor Gmbh
What technology area does this patent fall under?
Primary CPC classification H02M3/1588. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 18 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).