Data decoding device and process operating depending on selected modes

US9467709B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9467709-B2
Application numberUS-201213439687-A
CountryUS
Kind codeB2
Filing dateApr 4, 2012
Priority dateApr 11, 2011
Publication dateOct 11, 2016
Grant dateOct 11, 2016

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Abstract

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A data decoding device is provided that can decode, at high speed and with low cost, image data encoded at a high compression rate. Provided are an input unit to be input a first encoded data, a second encoded data, the second encoded data and reference data of the line image data; an acquisition unit to acquire, a first reference data to decode the first encoded data to the higher-end data and a second reference data to decode the second encoded data to the lower-end data; a decoding unit to decode the second encoded data to the lower-end data on the basis of the second reference data while the first encoded data is decoded to the higher-end data on the basis of the first reference data and; and a combining means to combine the higher-end data and the lower-end data that were decoded by the decoding unit.

First claim

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What is claimed is: 1. A data decoding device comprising: at least one memory storing a program; and a CPU, operating under control of the program, to perform: a first decoding step, a second decoding step, a combining step, a first selecting step, a second selecting step, and a reference data separation step, wherein in a case where a high speed operation mode is selected, the first selecting step controls a path so that reference data is transmitted to a first decoding unit that performs the first decoding step without separation by the reference data separation step, the first decoding step performs decoding processing based on compressed data of a first line and reference data for the first line and outputs first decoded data obtained by decoding the compressed data of the first line for a memory and the second decoding step that is performed by a second decoding unit, the second selecting step controls a path between the first and the second decoding units so that decoded data outputted from the first decoding unit is transmitted to the second decoding unit, and the second decoding step performs decoding processing based on compressed data of a second line next to the first line and the first decoded data and outputs second decoded data obtained by decoding the compressed data of the second line for a memory, wherein the decoding processing by the first decoding step and the decoding processing by the second decoding step are performed in parallel, and in a case where a high picture-quality operation mode is selected, the first selecting step controls a path so that reference data is transmitted to the first decoding unit through separation by the reference data separation step, the reference data separation step separates reference data into higher-end reference data and lower-end reference data, the first decoding step performs decoding processing based on higher-end compressed data of pixels included in an object line and the higher-end reference data and outputs third decoded data obtained by decoding the higher-end compressed data for the combining step, the second selecting step controls the path between the first and the second decoding units so that decoded data outputted from the first decoding unit is not transmitted to the second decoding unit, the second decoding step performs decoding processing based on lower-end compressed data of pixels included in the object line and the lower-end reference data and outputs fourth decoded data obtained by decoding the lower-end compressed data for the combining step, and the combining step generates decoded data of the object line based on the third decoded data and the fourth decoded data. 2. The data decoding device according to claim 1 , wherein the first decoding unit has the same configuration as that of the second decoding unit. 3. The data decoding device according to claim 1 , wherein the higher-end compressed data is generated based on a bit 15 to 8 of a data string in which a pixel is constituted by 2 bytes, and the lower-end compressed data is generated based on bit 7 to 0 of a data string in which a pixel is constituted by 2 bytes. 4. The data decoding device according to claim 1 , wherein the CPU also operates under control of the program to implement a reference data selector, and in a case where the high speed operation mode is selected, the first decoding unit is connected to a reference data Direct Memory Access Control (DMAC) by the reference data selector, and in a case where the high picture-quality operation mode is selected, the first decoding unit is connected to a reference data separation unit that performs the reference data separation step by the reference data selector. 5. The data decoding device according to claim 1 , further comprising a printing unit. 6. The data decoding device according to claim 1 , wherein the first decoding unit performs decoding processing in each of the high speed operation and the high picture-quality operation modes. 7. The data decoding device according to claim 1 , wherein the CPU also operates under control of the program to implement a selector, in a case where the high speed operation mode is selected, the selector obtains first decoded data outputted from the first decoding unit without combination by the combining step, and in a case where the high picture-quality operation mode is selected, the selector obtains data outputted from the combining step. 8. A data decoding method comprising: a first decoding step; a second decoding step; a combining step; a first selecting step; a second selecting step; and a reference data separation step, wherein in a case where a high speed operation mode is selected, the first selecting step controls a path so that reference data is transmitted to a first decoder that performs the first decoding step without separation by the reference data separation step, the first decoding step performs decoding processing based on compressed data of a first line and reference data for the first line and outputs first decoded data obtained by decoding the compressed data of the first line for a memory and the second decoding step that is performed by a second decoder, the second selecting step controls a path between the first and the second decoders so that decoded data outputted from the first decoder is transmitted to the second decoder, and the second decoding step performs decoding processing based on compressed data of a second line next to the first line and the first decoded data and outputs second decoded data obtained by decoding the compressed data of the second line for a memory, wherein the decoding processing by the first decoding step and the decoding processing by the second decoding step are performed in parallel, and in a case where a high picture-quality operation mode is selected, the first selecting step controls a path so that reference data is transmitted to the first decoder through separation by the reference data separation step, the reference data separation step separates reference data into higher-end reference data and lower-end reference data, the first decoding step performs decoding processing based on higher-end compressed data of pixels included in an object line and the higher-end reference data and outputs third decoded data obtained by decoding the higher-end compressed data for the combining step, the second selecting step controls the path between the first and the second decoders so that decoded data outputted from the first decoder is not transmitted to the second decoder, the second decoding step performs decoding processing based on lower-end compressed data of pixels included in the object line and the lower-end reference data and outputs fourth decoded data obtained by decoding the lower-end compressed data for the combining step, and the combining step generates decoded data of the object line based on the third decoded data and the fourth decoded data. 9. The data decoding method according to claim 8 , wherein the first decoding step has the same configuration as that of the second decoding step. 10. The data decoding method according to claim 8 , wherein the higher-end compressed data is generated based on a bit 15 to 8 of a data string in which a pixel is constituted by 2 bytes, and the lower-end compressed data is generated based on bit 7 to 0 of a data string in which a pixel is constituted by 2 bytes. 11. The data decoding method according to claim 8 , wherein in a case where a high speed operation mode is selected, the first decoder is connected to a reference data Direct Memory Access Control (DMAC) by a reference data selector that performs a reference data selecting step, an

Assignees

Inventors

Classifications

  • H04N19/44Primary

    Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder · CPC title

  • specially adapted for multi-view video sequence encoding · CPC title

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What does patent US9467709B2 cover?
A data decoding device is provided that can decode, at high speed and with low cost, image data encoded at a high compression rate. Provided are an input unit to be input a first encoded data, a second encoded data, the second encoded data and reference data of the line image data; an acquisition unit to acquire, a first reference data to decode the first encoded data to the higher-end data and…
Who is the assignee on this patent?
Fujita Shigeru, Horikoshi Hiroki, Hosogoshi Hiroyuki, and 1 more
What technology area does this patent fall under?
Primary CPC classification H04N19/44. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 11 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).