Pulse width modulation control unit, voltage regulator and control method thereof

Patent metadata

Field	Value
Publication number	US-9467134-B2
Application number	US-201414484835-A
Country	US
Kind code	B2
Filing date	Sep 12, 2014
Priority date	May 28, 2014
Publication date	Oct 11, 2016
Grant date	Oct 11, 2016

Abstract

A PWM control unit is provided. A comparison unit compares an output voltage with a reference voltage to generate a first compared result, and controls a voltage of a first node. A constant current source is coupled to the first node. A storage module is coupled to the first node and receives a ground voltage. A first comparator compares the output voltage with the voltage of the first node to generate a turn-on signal. A second comparator compares the voltage of the first node with the input voltage to generate an output signal. A logic gate generates a turn-off signal according to the turn-on and output signals. When each of the turn-on and output signals is at a first level, a logic gate asserts the turn-off signal at a second level. The PWM generator combines the turn-on and turn-off signals to generate a PWM signal.

First claim

What is claimed is:

1. A pulse width modulation (PWM) control unit, comprising:
a comparison unit comparing an output voltage with a reference voltage to generate a first compared result and controlling a voltage of a first node according to the first compared result;
a constant current source receiving an input voltage and coupled to the first node;
a storage module coupled to the first node and receiving a ground voltage;
a first comparator comparing the output voltage with the voltage of the first node to generate a turn-on signal;
a second comparator comparing the voltage of the first node with the input voltage to generate an output signal;
a logic gate generating a turn-off signal according to the turn-on signal and the output signal, wherein when each of the turn-on signal and the output signal is at a first level, the logic gate asserts the turn-off signal at a second level, and the first level is lower than the second level; and
a PWM generator combining the turn-on signal and the turn-off signal to generate a PWM signal.

2. The PWM control unit as claimed in claim 1 , wherein the comparison unit comprises:
a third comparator comparing the output voltage and the reference voltage to generate a second compared result; and
a reset module coupled between the third comparator and the first node and resetting the voltage of the first node according to the second compared result.

3. The PWM control unit as claimed in claim 2 , wherein when the output voltage is lower than the reference voltage, the reset module asserts the voltage of the first node to be equal to the ground voltage during a first time period and asserts the voltage of the first node to a non-ground voltage during a second time period.

4. The PWM control unit as claimed in claim 3 , wherein during the first time period, the storage module is in a discharge state, and during the second time period, the constant current source charges the storage module.

5. The PWM control unit as claimed in claim 1 , wherein the logic gate is a NOR gate.

6. A voltage regulator converting an input voltage into an output voltage and comprising:
a first switch controlling a voltage of a first node to be equal to the input voltage according to a first control signal;
a second switch controlling the voltage of the first node to be equal to a ground voltage according to a second control signal;
a filtering unit generating the output voltage according to the voltage of the first node;
a PWM control unit comprising:
a comparison unit comparing the output voltage with a reference voltage to generate a first compared result and controlling a voltage of a second node according to the first compared result;
a first comparator comparing the output voltage with the voltage of the second node to generate a turn-on signal;
a second comparator comparing the voltage of the second node with the input voltage to generate an output signal;
a logic gate generating a turn-off signal according to the turn-on signal and the output signal, wherein when each of the turn-on signal and the output signal is at a first level, the logic gate asserts the turn-off signal at a second level, and the first level is lower than the second level; and
a PWM generator combining the turn-on signal and the turn-off signal to generate a PWM signal; and
a driver generating the first and the second control signals according to the PWM signal.

7. The voltage regulator as claimed in claim 6 , further comprising:
a constant current source receiving the input voltage and coupled to the second node; and
a storage module coupled to the second node and receiving the ground voltage.

8. The voltage regulator as claimed in claim 6 , wherein the comparison unit comprises:
a third comparator comparing the output voltage and the reference voltage to generate a second compared result; and
a reset module coupled between the third comparator and the second node and resetting the voltage of the second node according to the second compared result.

9. The voltage regulator as claimed in claim 8 , wherein when the output voltage is lower than the reference voltage, the reset module asserts the voltage of the second node to be equal to the ground voltage during a first time period and asserts the voltage of the second node to a non-ground voltage during a second time period.

10. The voltage regulator as claimed in claim 9 , wherein during the first time period, the storage module is at a discharge state, and during the second time period, the constant current source charges the storage module.

11. The voltage regulator as claimed in claim 6 , wherein during a first time period, the first switch is turned on to assert the voltage of the first node to be equal to the input voltage, during a second time period, the second switch is turned on to assert the voltage of the first node to be equal to the ground voltage, and during a third time period, the first and the second switches are turned off.

12. The voltage regulator as claimed in claim 11 , wherein the filtering unit is a low-pass filter comprising a inductor and a capacitor, during the first time period, current passing through the inductor is increased, during the second time period, the current passing through the inductor is reduced, and during the third time period, no current passes through the inductor.

13. A control method comprising:
utilizing an output stage circuit to convert an input voltage into an output voltage;
comparing the output voltage with a reference voltage to generate a first compared result and controlling a voltage of a first node according to the first compared result;
generating a turn-on signal and a turn-off signal according to the voltage of the first node;
combining the turn-on signal and the turn-off signal to generate a PWM signal; and
decoding the PWM signal to generate a first control signal and a second control signal to the output stage circuit, wherein a phase of the first control signal is equal to a phase of the turn-on signal, and a phase of the second control signal is equal to a phase of the turn-off signal.

14. The control method as claimed in claim 13 , wherein when the output voltage is lower than the reference voltage, the voltage of the first node is reset.

15. The control method as claimed in claim 13 , wherein when the output voltage is lower than the reference voltage, the voltage of the first node is asserted to a ground voltage during a first time period and the voltage of the first node is asserted to a non-ground voltage during a second time period.

16. The control method as claimed in claim 13 , wherein a level of the first control signal is not equal to a level of the turn-on signal, and a level of the second control signal is not equal to a level of the turn-off signal.

17. The control method as claimed in claim 13 , wherein during a first time period, the first control signal is changed from a first level to a second level and the first control signal is maintained at the second level for a first time, after the first time period, the first control signal is changed from the second level to the first level, during a second time period, the second signal is changed from the first level to the second level and the second control signal is maintained at the second level for a second time, after the second time period, the second control signal is changed from the second level to the first level, and during a third time period, each of the first and the second control signals is maintained at the first level.

Assignees

• Nuvoton Technology Corp

Inventors

• Wu How-Wei

Classifications

• H02M2001/0045

  Electricity · mapped topic

• H03K7/08 Primary

  Duration or width modulation {; Duty cycle modulation} · CPC title

• H02M3/156

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/0045

  Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title