Differential amplifier with high-speed common mode feedback

Patent metadata

Field	Value
Publication number	US-9467109-B2
Application number	US-201414294308-A
Country	US
Kind code	B2
Filing date	Jun 3, 2014
Priority date	Jun 3, 2014
Publication date	Oct 11, 2016
Grant date	Oct 11, 2016

Abstract

The differential signals at the outputs of a differential amplifier quickly change in response to common mode changes in the output differential signals. The amplified input signals amplified by the differential amplifier quickly change in response to common mode changes in the differential signals input into the differential amplifier. A bias voltage input to the differential amplifier is isolated to remove low-frequency components from the bias voltage.

First claim

What is claimed is:

1. A differential amplifier comprising:
a differential pair stage to receive a pair of input differential signals, and amplify the pair of input differential signals to form a pair of amplified differential signals at a pair of amplifier stage outputs;
a driver stage connected to the differential pair stage, the driver stage to drive a pair of output differential signals in response to the pair of amplified differential signals; and
a common mode feedback stage connected to the differential pair stage and the driver stage, the common mode feedback stage including:
a RC sensing circuit to generate a measured common mode voltage in response to the pair of output differential signals;
a diff-pair circuit connected to the RC sensing circuit, the diff-pair circuit to oppositely vary a first diff-pair current and a second diff-pair current in response to a difference between a magnitude of the measured common mode voltage and a magnitude of a reference common mode voltage;
a control circuit connected to the driver stage and the diff-pair circuit, the control circuit to vary the pair of output differential signals in response to a magnitude of a first portion of the first diff-pair current; and
a pull down circuit connected to the control circuit, the pull down circuit including first and second cross-coupled pull down transistors
the first pull down transistor having a control terminal connected to receive a portion of the first diff-pair current, and connected to sink a controlled second portion of the second diff-pair current; and
the second pull down transistor having a control terminal connected to receive the second diff-pair current, and connected to sink a controlled second portion of the first diff-pair current,
when the magnitude of the measured common mode voltage is greater than the magnitude of the reference common mode voltage, the pull down circuit to increase the controlled second portion of the first diff-pair current sunk by the second pull-down transistor, thereby decreasing the magnitude of the first portion of the first diff-pair current,
when the magnitude of the measured common mode voltage is less than the magnitude of the reference common mode voltage, the pull down circuit to increase the controlled second portion of the second diff-pair current sunk by the first pull-down transistor, thereby decreasing the controlled second portion of the first diff-pair current sunk by the second pull-down transistor, and thereby increasing the magnitude of the first portion of the first diff-pair current.

2. The differential amplifier of claim 1 wherein the first terminal of the first pull down transistor is a base of a first bipolar transistor, and the second terminal of the first pull down transistor is a collector of the first bipolar transistor.

3. The differential amplifier of claim 2 wherein the first terminal of the second pull down transistor is a base of a second bipolar transistor, and the second terminal of the second pull down transistor is a collector of the second bipolar transistor.

4. The differential amplifier of claim 1 wherein the differential pair stage includes a first input transistor, a second input transistor, and a tail current transistor connected to the first and second input transistors, the first and second input transistors to receive the pair of input differential signals.

5. The differential amplifier of claim 4 and further comprising a common mode feedback circuit connected to the tail current transistor and the pair of amplifier stage outputs, the common mode feedback circuit to pull up a voltage input to the tail current transistor in response to an increase in the amplified differential signals that results from a common mode component of the pair of input differential signals, and pull down the voltage input to the tail current transistor in response to a decrease in the amplified differential signals that results from the common mode component of the pair of input differential signals.

6. The differential amplifier of claim 5 wherein:
the tail current transistor has a gate, a source, and a drain; and
the common mode feedback circuit includes:
a first capacitor with a top plate connected to a first amplifier stage output of the pair of amplifier stage outputs, and a bottom plate connected to the gate of the tail current transistor; and
a second capacitor with a top plate connected to a second amplifier stage output of the pair of amplifier stage outputs, and a bottom plate connected to the gate of the tail current transistor.

7. The differential amplifier of claim 6 and further comprising an isolation circuit connected to the differential pair stage, the isolation circuit to receive an input bias voltage, substantially remove a low-frequency component from the input bias voltage to form a constant bias voltage, and output the constant bias voltage to the differential pair stage.

8. The differential amplifier of claim 7 wherein the isolation circuit includes:
a first switch connected to the gate of the tail current transistor;
a second switch connected to the first switch; and
a bypass capacitor connected to the first and second switches.

9. A differential amplifier comprising:
a differential pair stage having a first input transistor, a second input transistor, and a tail current transistor connected to the first and second input transistors, the first and second input transistors to receive a pair of input differential signals, and amplify the pair of input differential signals to form a pair of amplified differential signals at a pair of amplifier stage outputs;
a common mode feedback circuit connected to the tail current transistor and the pair of amplifier stage outputs, the common mode feedback circuit to pull up a voltage input to the tail current transistor in response to an increase in the amplified differential signals that results from a common mode component of the pair of input differential signals, and pull down the voltage input to the tail current transistor in response to a decrease in the amplified differential signals that results from the common mode component of the pair of input differential signals;
a driver stage connected to the differential pair stage, the driver stage to drive a pair of output differential signals in response to the pair of amplified differential signals; and
a common mode feedback stage connected to the differential pair stage and the driver stage, the common mode feedback stage includes:
a RC sensing circuit to generate a measured common mode voltage in response to the pair of output differential signals;
a diff-pair circuit connected to the RC sensing circuit, the diff-pair circuit to vary a first diff-pair current and a second diff-pair current in response to a difference between a magnitude of the measured common mode voltage and a magnitude of a reference common mode voltage; and
a control circuit connected to the driver stage and the diff-pair circuit, the control circuit to vary the pair of output differential signals in response to a magnitude of the first diff-pair current; and
a pull down circuit connected to the control circuit, the pull down circuit including first and second cross-coupled pull down transistors
the first pull down transistor having a control terminal connected to receive a portion of the first diff-pair current, and connected to sink a controlled second portion of the second diff-pair current; and
the second pull down transistor having a control terminal connected to receive the second diff-pair current, and connected to sink a controlled second portion of the first diff-pair current,
when the magnitude of the measured common mode voltage is greater than the magnitude of

Assignees

• Texas Instruments Inc

Inventors

• Lee Bumha

Classifications

• H03F2203/45424

  the CMCL comprising a comparator circuit · CPC title

• H03F3/45659

  Controlling the loading circuit of the differential amplifier · CPC title

• H03F1/0233

  by using a signal derived from the output signal, e.g. bootstrapping the voltage supply · CPC title

• H03F2203/45404

  the CMCL comprising capacitors containing, not in parallel with the resistors, an addition circuit · CPC title

• H03F3/45668 Primary

  Controlling the input circuit of the differential amplifier · CPC title