Semiconductor device and manufacturing method thereof

US9466678B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9466678-B2
Application numberUS-201514613343-A
CountryUS
Kind codeB2
Filing dateFeb 3, 2015
Priority dateDec 18, 2014
Publication dateOct 11, 2016
Grant dateOct 11, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes a substrate, an epitaxial structure, and a recess. The epitaxial structure is disposed in the substrate. The recess is formed in the epitaxial structure, where the recess has a cross-section in a direction perpendicular to the substrate, and at least one portion of the recess is gradually expanded from an opening of the recess.

First claim

Opening claim text (preview).

What is claimed is: 1. A manufacturing method of a semiconductor device, comprising: forming a first recess in a substrate; forming an epitaxial structure in the first recess; forming a dielectric layer on the substrate; forming a contact opening in the dielectric layer; forming a second recess in the epitaxial structure through the contact opening, wherein the second recess has a depth being 30% -70% of a height of the epitaxial structure and has a cross-section along a direction perpendicular to the substrate and at least a portion of the cross-section is gradually expanded from an opening of the second recess; and performing a silicidation process to form a silicide layer on a surface of the second recess. 2. The manufacturing method of the semiconductor device of claim 1 , wherein the forming of the second recess comprises: vertically etching the epitaxial structure to form a third recess; and laterally etching a sidewall of the third recess to form the second recess. 3. The manufacturing method of the semiconductor device of claim 1 , further comprising: providing a fin-shaped structure, the fin-shaped structure being formed in the substrate and the first recess being formed in the fin-shaped structure. 4. A semiconductor device, comprising: a substrate; an epitaxial structure disposed in the substrate; a recess disposed in the epitaxial structure, wherein the recess has a depth being 30%-70% of a height of the epitaxial structure and has a cross-section along a direction perpendicular to the substrate and at least a portion of the cross-section is gradually expanded from an opening of the recess; and a contact plug disposed on the substrate, wherein a portion of the contact plug is encompassed by the epitaxial structure. 5. The semiconductor device of claim 4 , wherein the cross-section of the recess has a bottom surface lower than a top surface of the substrate. 6. The semiconductor device of claim 5 , wherein the cross-section of recess has a sidewall, and there is an angle between the sidewall and the top surface of the substrate being between 50 degrees and 72 degrees. 7. The semiconductor device of claim 4 , wherein the cross-section of the recess has a bottom surface, and a lowest portion of the bottom surface is lower than a widest portion a cross-section of the epitaxial structure. 8. The semiconductor device of claim 7 , wherein the bottom surface is an arc bottom surface. 9. The semiconductor device of claim 4 , wherein the cross-section of the recess has a trapezoid shape or a hexagon shape. 10. The semiconductor device of claim 4 , further comprising: a silicide layer disposed on a surface of the recess. 11. The semiconductor device of claim 10 , further comprising: a dielectric layer disposed on the substrate; and the contact plug disposed in the dielectric layer and electrically connected the epitaxial structure. 12. The semiconductor device of claim 11 , wherein the silicide layer is disposed between the contact plug and the epitaxial structure. 13. The semiconductor device of claim 10 , wherein the silicide layer comprises titanium silicide. 14. The semiconductor device of claim 4 , further comprising: a fin-shaped structure, wherein the epitaxial structure is disposed in the fin-shaped structure. 15. A semiconductor device, comprising: a substrate; an epitaxial structure disposed in the substrate; a recess disposed in the epitaxial structure, wherein the recess has a trapezoid shape and has a depth being 30-70% of a height of the epitaxial structure; and a contact plug disposed on the substrate, wherein a portion of the contact plug is encompassed by the epitaxial structure. 16. The semiconductor device of claim 15 , further comprising: a silicide layer disposed on a surface of the recess. 17. The semiconductor device of claim 15 , wherein a cross-section of the recess has a bottom surface, and a lowest portion of the bottom surface is lower than a widest portion a cross-section of the epitaxial structure.

Assignees

Inventors

Classifications

  • Etching of wafers, substrates or parts of devices · CPC title

  • using conductive layers comprising silicides · CPC title

  • by introducing additional elements therein · CPC title

  • in openings in dielectrics · CPC title

  • using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9466678B2 cover?
The present invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes a substrate, an epitaxial structure, and a recess. The epitaxial structure is disposed in the substrate. The recess is formed in the epitaxial structure, where the recess has a cross-section in a direction perpendicular to the substrate, and at least one portion of the r…
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D30/0212. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 11 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).