Self-calibrated voltage regulator

Patent metadata

Field	Value
Publication number	US-9461539-B2
Application number	US-201313839295-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Mar 15, 2013
Publication date	Oct 4, 2016
Grant date	Oct 4, 2016

Abstract

A voltage regulator includes a driving circuit, a feedback circuit, first and second control circuits and a resistor. The driving circuit is coupled to an input node and an output node and generates an output voltage at the output node from an input voltage at the input node. The feedback circuit is coupled to the output node and generates a feedback voltage based on the output voltage. The first control circuit is coupled to the feedback circuit and the driving circuit to control the output voltage based on the feedback voltage. The resistor has opposite first and second terminals. The first terminal of the resistor is coupled to the output node. The second control circuit is coupled to the second terminal of the output stage resistor and the feedback circuit to control the feedback voltage based on a regulated voltage at the second terminal of the resistor.

First claim

What is claimed is:

1. A voltage regulator, comprising:
an input node;
an output node;
a driving circuit coupled to the input node and the output node, the driving circuit configured to generate an output voltage at the output node from an input voltage at the input node;
a feedback circuit coupled to the output node, the feedback circuit configured to generate a feedback voltage based on the output voltage;
a first control circuit coupled to the feedback circuit and the driving circuit, the first control circuit configured to control the output voltage based on the feedback voltage;
an output stage resistor having opposite first and second terminals, the first terminal of the output stage resistor coupled to the output node; and
a second control circuit coupled to the second terminal of the output stage resistor and the feedback circuit, the second control circuit configured to control the feedback voltage based on a regulated voltage at the second terminal of the output stage resistor.

2. The voltage regulator of claim 1 , wherein the first control circuit and the second control circuit are configured to maintain the regulated voltage constant in response to variations in a load current flowing through the output stage resistor.

3. The voltage regulator of claim 1 , wherein
the feedback circuit comprises a voltage divider having a variable voltage ratio that defines the feedback voltage; and
the second control circuit is configured to vary the voltage ratio of the voltage divider based on the regulated voltage.

4. The voltage regulator of claim 3 , wherein
the voltage divider comprises:
a first resistor coupled between the output node and an intermediate node, the intermediate node coupled to the first control circuit; and
a second resistor coupled between the intermediate node and a voltage supply terminal; and

at least one of the first resistor or the second resistor is a variable resistor having a resistance value that is variable under control of the second control circuit.

5. The voltage regulator of claim 4 , wherein
the variable resistor comprises a plurality of interconnected circuits each comprising a resistor and a transistor coupled to each other; and
the second control circuit is coupled to gates of the transistors and configured to supply a digital control signal to the gates of the transistors to selectively turn ON or OFF the transistors based on the regulated voltage.

6. The voltage regulator of claim 4 , wherein
the variable resistor comprises a transistor; and
the second control circuit is coupled to a gate of the transistor and configured to supply an analog control signal to the gate of the transistor to vary a resistance of the transistor based on the regulated voltage.

7. The voltage regulator of claim 6 , further comprising:
a diode-connected transistor coupled in parallel with the transistor of the variable resistor.

8. The voltage regulator of claim 1 , further comprising:
a transistor coupled between the output node and a voltage supply terminal; and
a third control circuit coupled to the feedback circuit and a gate terminal of the transistor, the third control circuit configured to control the output voltage based on the feedback voltage by adjusting a current flowing through the transistor between the output node and the voltage supply terminal.

9. The voltage regulator of claim 8 , further comprising:
a bias voltage circuit coupled to the gate terminal of the transistor and configured to supply a bias voltage to the gate terminal of the transistor to configure the transistor in a saturation mode.

10. The voltage regulator of claim 1 , wherein a resistance value of the output stage resistor is from 2Ω to 10Ω.

11. A voltage regulator, comprising:
an input node;
an output node;
a driving transistor including
a first terminal coupled to the input node,
a second terminal coupled to the output node, and
a gate terminal;

a voltage divider including
a first resistor coupled between the output node and an intermediate node, and
a second resistor coupled between the intermediate node and a voltage supply terminal, wherein at least one of the first resistor or the second resistor is a variable resistor;

a first operational amplifier including
a first input coupled to a reference voltage node,
a second input coupled to the intermediate node of the voltage divider, and
an output coupled to the gate terminal of the driving transistor;

an output stage resistor having opposite first and second terminals, the first terminal of the output stage resistor coupled to the output node; and
a second operational amplifier including
a first input coupled to a set voltage node,
a second input coupled to the second terminal of the output stage resistor, and
an output coupled to the variable resistor of the voltage divider for controlling a resistance value of the variable resistor.

12. The voltage regulator of claim 11 , further comprising:
a state machine coupled between the output of the second operational amplifier and the variable resistor of the voltage divider, the state machine configured to convert a voltage at the output of the second operational amplifier to a digital control signal for controlling the resistance value of the variable resistor.

13. The voltage regulator of claim 12 , wherein
the variable resistor comprises a plurality of interconnected circuits each comprising a resistor and a transistor coupled to each other; and
an output of the state machine is coupled to gates of the transistors in the variable resistor to supply the digital control signal to the gates of the transistors to selectively turn ON or OFF the transistors.

14. The voltage regulator of claim 11 , wherein
the variable resistor comprises a transistor; and
the output of the second operational amplifier is coupled to a gate of the transistor to supply an analog control signal to the gate of the transistor to vary a resistance of the transistor.

15. The voltage regulator of claim 14 , further comprising:
a diode-connected transistor coupled in parallel with the transistor of the variable resistor.

16. The voltage regulator of claim 11 , further comprising:
a further transistor coupled between the output node and a voltage supply terminal, the further transistor configured to operate in a saturation mode;
a capacitor coupled to a gate terminal of the further transistor; and
a third operational amplifier including
a first input coupled to the reference voltage node,
a second input coupled to the intermediate node of the voltage divider, and
an output coupled to the gate terminal of the driving transistor via the capacitor.

17. The voltage regulator of claim 16 , wherein
the driving transistor is a p-channel metal-oxide semiconductor (PMOS) transistor,
the first input of the first operational amplifier is an inverting input, and the second input of the first operational amplifier is a non-inverting input,
the first input of the second operational amplifier is an inverting input, and the second input of the second operational amplifier is a non-inverting input,
the further transistor is an n-channel metal-oxide semiconductor (NMOS) transistor, and
the first input of the third operational amplifier is an inverting input, and the second input of the third operational amplifier is a non-inverting input.

18. A process of operating a voltage regulator, the process comprising:
receiving an input voltage at an input node of the voltage regulator;
generating, from the input vo

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chern Chan-Hong
• Chung Tao Wen
• Huang Ming-Chieh
• Lin Chih-Chang
• Huang Tsung-Ching (Jim)

Classifications

• H02M2001/0025

  Electricity · mapped topic

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H02M1/0025

  Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title