Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
US9461002B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9461002-B2 |
| Application number | US-201514874189-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 2, 2015 |
| Priority date | Dec 3, 2014 |
| Publication date | Oct 4, 2016 |
| Grant date | Oct 4, 2016 |
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A semiconductor device and a method of making the same. The semiconductor device includes a semiconductor substrate mounted on a carrier. The semiconductor substrate includes a Schottky diode. The Schottky diode has an anode and a cathode. The semiconductor device also includes one or more bond wires connecting the cathode to a first electrically conductive portion of the carrier. The semiconductor device further includes one or more bond wires connecting the anode to a second electrically conductive portion of the carrier. The first electrically conductive portion of the carrier is electrically isolated from the second electrically conductive portion of the carrier. The first electrically conductive portion of the carrier is configured to provide shielding against electromagnetic interference associated with switching of the anode during operation of the device. Both the cathode and the first electrically conductive portion of the carrier are electrically isolated from a backside of the semiconductor substrate.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device comprising: a semiconductor substrate mounted on a carrier, the semiconductor substrate including a Schottky diode, the Schottky diode having an anode and a cathode; one or more bond wires connecting the cathode to a first electrically conductive portion of the carrier; and one or more bond wires connecting the anode to a second electrically conductive portion of the carrier, wherein the first electrically conductive portion of the carrier is electrically isolated from the second electrically conductive portion of the carrier, wherein the first electrically conductive portion of the carrier is configured to provide shielding against electromagnetic interference associated with switching of the anode during operation of the device, and wherein both the cathode and the first electrically conductive portion of the carrier are electrically isolated from a backside of the semiconductor substrate. 2. The semiconductor device of claim 1 , wherein the anode is electrically connected to the backside of the semiconductor substrate. 3. The semiconductor device of claim 2 , wherein the anode is electrically connected to the backside of the semiconductor substrate by an electrically conductive connection passing through the semiconductor substrate. 4. The semiconductor device of claim 3 , wherein the electrically conductive connection passing through the semiconductor substrate comprises a via filled with an electrically conductive material. 5. The semiconductor device of claim 2 , wherein the backside of the semiconductor substrate is mounted on an electrically conductive mounting portion that is isolated from both the cathode and the first electrically conductive portion of the carrier, and wherein the anode is electrically connected to said electrically conductive mounting portion. 6. The semiconductor device of claim 5 , wherein the anode is electrically connected to the electrically conductive mounting portion by a down-bond wire. 7. The semiconductor device of claim 1 , wherein the carrier comprises a lead frame. 8. The semiconductor device of claim 1 , wherein the carrier comprises a dielectric substrate having one or more metallized layers. 9. The semiconductor device of claim 1 , wherein the backside of the semiconductor substrate is electrically connected to an output connection for applying a potential to the backside of the substrate. 10. The semiconductor device of claim 1 , wherein the backside of the substrate is electrically isolated from the carrier by an intervening dielectric. 11. The semiconductor device of claim 1 , wherein the first electrically conductive portion of the carrier extends at least partially around a periphery of the substrate to provide shielding against electromagnetic interference associated with switching of the anode during operation of the device. 12. The semiconductor device of claim 1 , wherein the first electrically conductive portion of the carrier extends at least partially beneath the substrate to provide shielding against electromagnetic interference associated with switching of the anode during operation of the device. 13. The semiconductor device of claim 1 , wherein the Schottky diode is a GaN/AlGaN diode. 14. A power amplifier comprising the semiconductor device of claim 1 . 15. A method of making a semiconductor device, the method comprising: mounting a semiconductor substrate on a carrier, the substrate including a Schottky diode, the Schottky diode having an anode and a cathode; connecting the cathode to a first electrically conductive portion of the carrier using one or more bond wires; and connecting the anode to a second electrically conductive portion of the carrier using one or more bond wires, wherein the first electrically conductive portion of the carrier is electrically isolated from the second electrically conductive portion of the carrier, wherein the first electrically conductive portion of the carrier is configured to provide shielding against electromagnetic interference associated with switching of the anode during operation of the device, and wherein both the cathode and the first electrically conductive portion of the carrier are electrically isolated from a backside of the semiconductor substrate.
Die-attach connectors and bond wires · CPC title
being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title
not being orthogonal to a side surface of the chip, e.g. fan-out arrangements · CPC title
changes in dispositions · CPC title
Dispositions of multiple bond wires · CPC title
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