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Method, display adapter and computer program product for improved graphics performance by using a replaceable culling program
US9460552B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9460552-B2 |
| Application number | US-52389408-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 23, 2008 |
| Priority date | Jan 24, 2007 |
| Publication date | Oct 4, 2016 |
| Grant date | Oct 4, 2016 |
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Abstract
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It is presented a method for improving performance of generation of digitally represented graphics. Said method comprises the steps of: selecting ( 440 ) a tile comprising fragments to process; executing ( 452 ) a culling program for the tile, the culling program being replaceable; and executing a set of instructions, selected from a plurality of sets of instructions based on an output value of the culling program, for each of a plurality of subsets of the fragments. A corresponding display adapter and computer program product are also presented.
First claim
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The invention claimed is: 1. A method comprising: receiving a combined pixel shader program having a first set of instructions; automatically deriving, by a processor, a culling program having a second set of instructions, and a pixel shader program having the first set of instructions, said second set of instructions being derived from said combined pixel shader program, wherein deriving includes selecting a subset of the first set of instructions in the combined pixel shader p…
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Physics · mapped topic
- G06T15/005Primary
Physics · mapped topic
- G06T15/40Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9460552B2 cover?
- It is presented a method for improving performance of generation of digitally represented graphics. Said method comprises the steps of: selecting ( 440 ) a tile comprising fragments to process; executing ( 452 ) a culling program for the tile, the culling program being replaceable; and executing a set of instructions, selected from a plurality of sets of instructions based on an output value of…
- Who is the assignee on this patent?
- Akenine-Moller Tomas, Hasselgren Jon, Intel Corp
- What technology area does this patent fall under?
- Primary CPC classification G06T15/005. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Oct 04 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).