Vector string range compare

US9459864B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9459864-B2
Application numberUS-201213421560-A
CountryUS
Kind codeB2
Filing dateMar 15, 2012
Priority dateMar 15, 2012
Publication dateOct 4, 2016
Grant dateOct 4, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Processing of character data is facilitated. A Vector String Range Compare instruction is provided that compares each element of a vector with a range of values based on a set of controls to determine if there is a match. An index associated with the matched element or a mask representing the matched element is stored in a target vector register. Further, the same instruction, the Vector String Range Compare instruction, also searches a selected vector for null elements, also referred to as zero elements.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising: a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising: at least one opcode field to provide an opcode, the opcode identifying a Vector String Range Compare operation; an extension field to be used in designating one or more registers; a first register field to designate a first register, the first register comprising a first operand; a second register field to designate a second register, the second register comprising a second operand; a third register field to designate a third register, the third register comprising a third operand; a fourth register field to designate a fourth register, the fourth register comprising a fourth operand; and a mask field, the mask field comprising one or more controls to be used during execution of the machine instruction; and executing the machine instruction, the execution comprising: identifying the first register based on a combination of the first register field and a first portion of the extension field, identifying the second register based on a combination of the second register field and a second portion of the extension field, identifying the third register based on a combination of the third register field and a third portion of the extension field, and identifying the fourth register based on a combination of the fourth register field and a fourth portion of the extension field; comparing each element of a plurality of elements of the second operand with each value of one or more values of the third operand using one or more controls programmatically provided by the fourth operand to determine whether there is a match as defined by the one or more values of the third operand and the one or more controls of the fourth operand, wherein the one or more values of the third operand form one or more pairs of values representing one or more ranges against which each element of the plurality of elements of the second operand is compared, and wherein the comparing provides one or more indicators for each element of the plurality of elements of the second operand, wherein each indicator of the one of more indicators for an element corresponds to a range of the one or more ranges and indicates whether the element is within the range; and providing a result in the first operand based on the comparing. 2. The computer program product of claim 1 , wherein the method further comprises: determining whether the mask field includes a zero element control set to indicate that a search for a zero element is to be performed as part of executing the machine instruction; and based on the mask field including the zero element control set to indicate that the search for a zero element is to be performed, searching the second operand for a zero element. 3. The computer program product of claim 1 , wherein the one or more controls of the fourth operand comprises at least one of greater than, less than or equal. 4. The computer program product of claim 1 , wherein the mask field comprises a result type, the result type defining how the result is provided in the first operand. 5. The computer program product of claim 4 , wherein: based on the result type having a first value, the result is placed in one selected location of the first operand; and based on the result type having a second value, the result placed in the first operand is a mask indicating true or false for the element depending on the comparing. 6. The computer program product of claim 5 , wherein the result placed in the one selected location comprises one of a first byte of a first value within the range or an indication of no match. 7. The computer program product of claim 1 , wherein the mask field comprises a condition code set control, and wherein the method further comprises: determining whether the condition code set control is set; and based on the condition code set control being set, setting a condition code for execution of the machine instruction. 8. The computer program product of claim 7 , wherein the setting the condition code comprises one of: setting the condition code to a value indicating detection of a zero element in a lower indexed element than any compare; setting the condition code to a value indicating a comparison found; and setting the condition code to a value indicating no comparison found. 9. The computer program product of claim 1 , wherein the executing comprises determining, at runtime, a direction for the comparing, wherein the direction is one of left-to-right or right-to-left, and the determination comprises accessing by the machine instruction a direction control to determine the direction. 10. A computer system for executing a machine instruction in a central processing unit, the computer system comprising: a memory; and a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising: obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising: at least one opcode field to provide an opcode, the opcode identifying a Vector String Range Compare operation; an extension field to be used in designating one or more registers; a first register field to designate a first register, the first register comprising a first operand; a second register field to designate a second register, the second register comprising a second operand; a third register field to designate a third register, the third register comprising a third operand; a fourth register field to designate a fourth register, the fourth register comprising a fourth operand; a mask field, the mask field comprising one or more controls to be used during execution of the machine instruction; and executing the machine instruction, the execution comprising: identifying the first register based on a combination of the first register field and a first portion of the extension field, identifying the second register based on a combination of the second register field and a second portion of the extension field, identifying the third register based on a combination of the third register field and a third portion of the extension field, and identifying the fourth register based on a combination of the fourth register field and a fourth portion of the extension field; comparing each element of a plurality of elements of the second operand with each value of one or more values of the third operand using one or more controls programmatically provided by the fourth operand to determine whether there is a match as defined by the one or more values of the third operand and the one or more controls of the fourth operand, wherein the one or more values of the third operand form one or more pairs of values representing one or more ranges against which each element of the plurality of elements of the second operand is compared, and wherein the comparing provides one or more indicators for each element of the plurality of elements of the second operand, wherein each indicator of the one or more indicators for an element corresponds to a range of the one or more ranges and indicates whether the element is within the range; and providing a result i

Assignees

Inventors

Classifications

  • Instructions to perform operations on packed data, e.g. vector, tile or matrix operations · CPC title

  • Compare instructions, e.g. Greater-Than, Equal-To, MINMAX · CPC title

  • Bit or string instructions · CPC title

  • Decoding the operand specifier, e.g. specifier format · CPC title

  • G06F9/3001Primary

    Arithmetic instructions · CPC title

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What does patent US9459864B2 cover?
Processing of character data is facilitated. A Vector String Range Compare instruction is provided that compares each element of a vector with a range of values based on a set of controls to determine if there is a match. An index associated with the matched element or a mask representing the matched element is stored in a target vector register. Further, the same instruction, the Vector String…
Who is the assignee on this patent?
Bradbury Jonathan D, Schwarz Eric M, Slegel Timothy J, and 1 more
What technology area does this patent fall under?
Primary CPC classification G06F9/30018. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 04 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).