AC coupled single-ended LVDS receiving circuit comprising low-pass filter and voltage regulator

US9459648B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9459648-B2
Application numberUS-201113814485-A
CountryUS
Kind codeB2
Filing dateAug 5, 2011
Priority dateAug 5, 2010
Publication dateOct 4, 2016
Grant dateOct 4, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A receiving circuit is provided that can accurately detect a clock signal that has a single phase and a small amplitude. A receiving circuit includes an AC coupled circuit 22 that creates an AC coupling between a first end and a second end, a low-pass filter circuit 23, 25 that produces a third signal by applying a low-pass filtering on a second signal that is produced on the second end in response to a first signal that is applied to the first end, and a comparator 21 that inputs the second signal and the third signal.

First claim

Opening claim text (preview).

The invention claimed is: 1. A receiving circuit comprising: an AC-coupled circuit configured to create an AC coupling between a first end and a second end; a low-pass filter circuit configured to, in response to a first signal that is applied to the first end, apply a low-pass filtering on a second signal that is produced on the second end to produce a reference signal; a comparator configured to receive an input of the second signal and the reference signal to produce an output signal; and a voltage-regulating circuit configured to match a voltage value of the second signal to a common-mode voltage rating of the comparator, wherein the voltage regulating circuit includes a series of resistors disposed between a power source voltage and a ground voltage. 2. The receiving circuit according to claim 1 , wherein the comparator is a low voltage differential signaling (LVDS) receiver. 3. The receiving circuit according to claim 1 , wherein the series of resistors comprises: a first resistor connected between the power source voltage and a first input end of the LVDS receiver, a second resistor connected between the first input end and a second input end of the LVDS receiver, and a third resistor element connected between the second input end and the ground voltage. 4. The receiving circuit according to claim 1 , wherein the AC coupled circuit includes a capacitive element. 5. The receiving circuit according to claim 1 , wherein the low-pass filter circuit includes a resistor element and a capacitive element. 6. The receiving circuit according to claim 1 , wherein the AC coupled circuit includes a transformer. 7. A signal transmitting circuit, comprising: a single-phase transmitting wiring; a damping resistor interposed in the transmitting wiring; an AC-coupled circuit configured to create an AC coupling between a first end and a second end, the first end connected to a receiving side of the transmitting wiring; a low-pass filter circuit configured to, in response to a first signal that is applied to a first end, apply a low-pass filtering on a second signal that is produced on the second end to produce a reference signal; a comparator configured to receive an input of the second signal and the reference signal to produce an output signal; and a voltage-regulating circuit configured to match a voltage value of the second signal to a common-mode voltage rating of the comparator, wherein the voltage regulating circuit includes a series of resistors disposed between a power source voltage and a ground voltage. 8. The signal transmitting circuit according to claim 7 , wherein the comparator is a low voltage differential signaling (LVDS) receiver. 9. A signal receiving method, comprising the steps of: extracting AC components from a received signal; adding the AC components with a voltage regulating circuit to produce a first voltage signal that matches a common-mode voltage rating of a comparator, wherein the voltage regulating circuit includes a series of resistors disposed between a power source voltage and a ground voltage; applying a low-pass filtering on the first voltage signal to produce a reference voltage signal; and comparing the first voltage signal and the reference voltage signal at the comparator to produce an output signal.

Assignees

Inventors

Classifications

  • Provision for current-mode coupling · CPC title

  • G05F5/00Primary

    Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output · CPC title

  • Arrangements for coupling common mode signals · CPC title

  • Arrangement for terminating transmission lines · CPC title

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Frequently asked questions

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What does patent US9459648B2 cover?
A receiving circuit is provided that can accurately detect a clock signal that has a single phase and a small amplitude. A receiving circuit includes an AC coupled circuit 22 that creates an AC coupling between a first end and a second end, a low-pass filter circuit 23, 25 that produces a third signal by applying a low-pass filtering on a second signal that is produced on the second end in …
Who is the assignee on this patent?
Kanamaru Hiroki, Gvbb Holdings Sarl
What technology area does this patent fall under?
Primary CPC classification G05F5/00. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 04 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).