Low-dropout voltage regulator circuit
US-12164317-B2 · Dec 10, 2024 · US
US9459639B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9459639-B2 |
| Application number | US-201514634279-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 27, 2015 |
| Priority date | Jul 23, 2014 |
| Publication date | Oct 4, 2016 |
| Grant date | Oct 4, 2016 |
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According to one embodiment, a power supply circuit includes a load switch, a switching control unit, a first control unit, and a second control unit. The load switch is connected to a power supply and switches between an ON state connecting the power supply to a load and an OFF state disconnecting the power supply from the load. The switching control unit outputs a first signal for controlling switching of the load switch between the ON and OFF states. The first control unit increases an output voltage of the load switch in a steady manner over a predetermined period of time when the load switch is switched to the ON state in response to the first signal. The second control unit causes a charging current to flow to the load switch after the first signal is output from the switching control unit.
Opening claim text (preview).
What is claimed is: 1. A power supply circuit, comprising: a load switch configured to switch between an ON state connecting the power supply to a load and an OFF state disconnecting the power supply from the load; a switching control unit configured to output a first signal for controlling switching of the load switch between the ON and OFF states; a first control unit configured to increase an output voltage of the load switch in a steady manner over a predetermined period of time when the load switch is switched to the ON state in response to the first signal; and a second control unit configured to adjust a charging current that flows to the load switch after the first signal is output from the switching control unit, wherein the second control unit includes: a reference voltage generation circuit configured to generate a reference voltage, a comparator configured to compare the reference voltage and a first voltage that is applied to a control input of the load switch, and a charging circuit that is controlled by an output signal of the comparator, the charging circuit configured to cause the charging current to flow to the load switch in accordance with the output signal of the comparator. 2. The power supply circuit according to claim 1 , wherein the load switch is a first MOS transistor having a gate, a source, and a drain, the drain being connected to the load, the load switch having a parasitic capacitance between the gate and the source of the first MOS transistor, and the first voltage is a gate-source voltage of the first MOS transistor, and the charging circuit causes the charging current to flow to the gate of the first MOS transistor in accordance with the output signal of the comparator. 3. The power supply circuit according to claim 2 , wherein the charging circuit generates the charging current until the gate-source voltage of the first MOS transistor reaches the reference voltage. 4. The power supply circuit according to claim 3 , wherein the reference voltage generation circuit includes a second MOS transistor having a conductivity type that is the same as a conductivity type of the first MOS transistor, and the reference voltage is the same as a threshold voltage of the first MOS transistor, and the charging circuit charges the parasitic capacitance until the gate-source voltage of the first MOS transistor is approximately equal to the threshold voltage of the first MOS transistor. 5. The power supply circuit according to claim 3 , wherein the reference voltage generation circuit includes a second MOS transistor, and the first and second MOS transistors are of a same conductivity type. 6. A power supply circuit, comprising: a load switch configured to supply power to a load circuit from a power supply according to a control voltage applied to a control input of the load switch; a second control unit configured to receive a switching control signal and supply a charging current to the control input until the control voltage equals a threshold voltage of the load switch; a first control unit configured to invert the switching control signal and supply an inverted switching control signal to the control input of the load switch after the control voltage exceeds the threshold voltage; and a switching control unit configured to receive an input signal and generate the switching control signal in response to the input signal, wherein the second control circuit includes: a reference voltage generation circuit that provides a reference voltage; a comparator that compares the reference voltage and the control voltage; and a charging circuit that supplies current to the control input of the load switch when an output from the comparator indicates the control voltage is less than the reference voltage. 7. The power supply circuit according to claim 6 , wherein the reference voltage is substantially equal to the threshold voltage of the load switch. 8. The power supply circuit according to claim 6 , wherein the charging circuit stops supplying current to control input of the load switch when the output from the comparator indicates that the control voltage is equal to or greater than the reference voltage. 9. The power supply circuit according to claim 6 , wherein the second control unit includes a clamp circuit configured to disable the comparator when the switching control signal has a state that turns off the load switch. 10. The power supply circuit according to claim 6 , wherein the load switch includes a first MOS transistor, and the reference voltage generation circuit includes a reference transistor that includes a second MOS transistor that is of a same type as the first MOS transistor, the reference transistor having a gate to source voltage that is the reference voltage. 11. The power supply circuit according to claim 6 , wherein the first control circuit includes: a current source between a first node and ground; and a pair of transistors each having a drain, a source, and a gate, the pair of transistors being arranged in an inverter configuration connected between the power supply and the first node, and the drains of the transistors being coupled to the second control unit and the gates of the transistors configured to receive the switching signal. 12. The power supply circuit according to claim 6 , wherein the load switch is a PMOS transistor and the parasitic capacitance is a gate to source capacitance of the PMOS transistor. 13. The power supply circuit according to claim 6 , wherein the power supply supplies power at a power supply voltage, the first control circuit further includes a clamp circuit configured to maintain the load switch in an on state when the clamp circuit is activated; and the switching control circuit is configured to provide a latching signal to the clamp circuit after the voltage on the load circuit has risen to the power supply voltage. 14. A method of operating a load switch connected between a power supply and a load, the method comprising: outputting, from a switching control unit, a first signal for controlling switching of a load switch between an ON state connecting the power supply to the load and an OFF state disconnecting the power supply from the load; causing a charging current to flow to the load switch after the first signal switching the load switch to the ON state is output from the switching control unit; and increasing an output voltage of the load switch in a steady manner over a predetermined period of time when the load switch is switched to the ON state in response to the first signal, wherein the load switch is a first MOS transistor and a parasitic capacitance is a gate-to-source capacitance of the first MOS transistor which is charged by the charging current, and charging of the parasitic capacitance ends when a control voltage of the load switch reaches a threshold voltage of the load switch. 15. The method according to claim 14 , wherein a reference voltage is set by a second MOS transistor which is a same type as the first MOS transistor. 16. The method according to claim 15 , further comprising: adjusting a size of the second MOS transistor to change a time required to reach the threshold voltage. 17. The method according to claim 14 , further comprising: latching the load switch on after the output voltage of the load circuit reaches a predetermined voltage.
using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title
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