Internal voltage generation circuit for adjusting internal voltage signal based on received bulk voltage signal, an upper limit reference voltage signal, and a lower limit reference voltage signal

Patent metadata

Field	Value
Publication number	US-9459638-B2
Application number	US-201414175505-A
Country	US
Kind code	B2
Filing date	Feb 7, 2014
Priority date	Sep 30, 2013
Publication date	Oct 4, 2016
Grant date	Oct 4, 2016

Abstract

An internal voltage generation circuit includes a bulk voltage generator and an internal voltage driver. The A bulk voltage generator is configured to output any one of a power supply voltage signal and a core voltage signal as a first bulk voltage signal and any one of a ground voltage signal and a low voltage signal as a second bulk voltage signal. An internal voltage driver receives the first and second bulk voltage signals to pull down an internal voltage signal when a level of the internal voltage signal is higher than a level of an upper limit reference voltage signal and to pull up the internal voltage signal when a level of the internal voltage signal is lower than a level of a lower limit reference voltage signal.

First claim

What is claimed is:

1. An internal voltage generation circuit comprising:
a bulk voltage generator suitable to output any one of a power supply voltage signal and a core voltage signal as a first bulk voltage signal and any one of a ground voltage signal and a low voltage signal as a second bulk voltage signal;
a reference voltage generator suitable for generating an upper limit reference voltage signal and a lower limit reference voltage signal, a first level voltage signal being obtained by lowering a level of the core voltage signal and a second level voltage signal being obtained by boosting a level of the ground voltage signal; and
an internal voltage driver suitable for receiving the first bulk voltage signal and the second bulk voltage signal to pull down an internal voltage signal when a level of the internal voltage signal is higher than a level of the upper limit reference voltage signal and to pull up the internal voltage signal when a level of the internal voltage signal is lower than a level of the lower limit reference voltage signal;
wherein the reference voltage generator includes:
a first level controller suitable for being coupled between a core voltage signal terminal and a first node and suitable for driving the first node to have the first level voltage signal generated from the core voltage signal;
a second level controller suitable for being coupled between a second node and a ground voltage signal terminal and suitable for driving the second node to have the second level voltage signal generated from the ground voltage signal; and
a voltage divider suitable for including a plurality of resistors being coupled in series between the first node and the second node and suitable for generating the upper limit reference voltage signal and the lower limit reference voltage signal;
wherein the upper limit reference voltage signal and the lower limit reference voltage signal are generated to have voltage levels between a level of the first level voltage signal and a level of the second level voltage signal.

2. The internal voltage generation circuit of claim 1 ,
wherein the core voltage signal is obtained by lowering a level of the power supply voltage signal supplied from an external system; and
wherein the low voltage signal is obtained by lowering a level of the ground voltage signal supplied from the external system.

3. The internal voltage generation circuit of claim 1 , wherein a level of the upper limit reference voltage signal is higher than a level of the lower limit reference voltage signal.

4. The internal voltage generation circuit of claim 1 , wherein the internal voltage driver maintains a level of the internal voltage signal without driving the internal voltage signal when a level of the internal voltage signal is higher than a level of the lower limit reference voltage signal and is lower than a level of the upper limit reference voltage signal.

5. The internal voltage generation circuit of claim 1 , wherein the bulk voltage generator includes:
a first switch unit suitable for outputting the core voltage signal as the first bulk voltage signal while the active signal is enabled and suitable for outputting the power supply voltage signal as the first bulk voltage signal while the active signal is disabled; and
a second switch unit suitable for outputting the ground voltage signal as the second bulk voltage signal while the active signal is enabled and suitable for outputting the low voltage signal as the second bulk voltage signal while the active signal is disabled.

6. The internal voltage generation circuit of claim 1 , wherein the internal voltage driver includes:
a comparison unit suitable for comparing the internal voltage signal with the lower limit reference voltage signal to generate a pull-up signal and suitable for comparing the internal voltage signal with the upper limit reference voltage signal to generate a pull-down signal; and
a drive unit suitable for pulling up the internal voltage signal when the pull-up signal is enabled and suitable for pulling down the internal voltage signal when the pull-down signal is enabled.

7. The internal voltage generation circuit of claim 6 , wherein the comparison unit includes:
a first comparator suitable for generating the pull-up signal enabled when a level of the internal voltage signal is lower than a level of the lower limit reference voltage signal; and
a second comparator suitable for generating the pull-down signal enabled when a level of the internal voltage signal is higher than a level of the upper limit reference voltage signal.

8. The internal voltage generation circuit of claim 6 , wherein the drive unit includes:
a pull-up element suitable for receiving the first bulk voltage signal as a back-bias voltage signal thereof and suitable for being turned on in response to the pull-up signal to pull up the internal voltage signal; and
a pull-down element suitable for receiving the second bulk voltage signal as a back-bias voltage signal thereof and suitable for being turned on in response to the pull-down signal to pull down the internal voltage signal.

9. A system comprising:
a processor;
a controller configured to receive a request and a data from the processor; and
a memory unit configured to receive the request and the data from the controller,
wherein the memory unit comprises:
a bulk voltage generator suitable to output any one of a power supply voltage signal and a core voltage signal as a first bulk voltage signal and any one of a ground voltage signal and a low voltage signal as a second bulk voltage signal;
a reference voltage generator suitable for generating an upper limit reference voltage signal and a lower limit reference voltage signal, a first level voltage signal being obtained by lowering a level of the core voltage signal and a second level voltage signal being obtained by boosting a level of the ground voltage signal; and
an internal voltage driver suitable for receive the first bulk voltage signal and the second bulk voltage signal to pull down an internal voltage signal when a level of the internal voltage signal is higher than a level of an upper limit reference voltage signal and to pull up the internal voltage signal when a level of the internal voltage signal is lower than a level of a lower limit reference voltage signal,
wherein the reference voltage generator includes:
a first level controller suitable for being coupled between a core voltage signal terminal and a first node and suitable for driving the first node to have the first level voltage signal generated from the core voltage signal;
a second level controller suitable for being coupled between a second node and a ground voltage signal terminal and suitable for driving the second node to have the second level voltage signal generated from the ground voltage signal; and
a voltage divider suitable for including a plurality of resistors being coupled in series between the first node and the second node and suitable for generating the upper limit reference voltage signal and the lower limit reference voltage signal,
wherein the upper limit reference voltage signal and the lower limit reference voltage signal are generated to have voltage levels between a level of the first level voltage signal and a level of the second level voltage signal.

Assignees

• Sk Hynix Inc

Inventors

• Choi Young Kyoung

Classifications

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G11C5/147

  Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence) · CPC title

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• G11C7/12

  Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines · CPC title

• G11C29/021

  in voltage or current generators · CPC title