Synchronization module for motor speed control

Patent metadata

Field	Value
Publication number	US-9459608-B2
Application number	US-201414498695-A
Country	US
Kind code	B2
Filing date	Sep 26, 2014
Priority date	Sep 26, 2014
Publication date	Oct 4, 2016
Grant date	Oct 4, 2016

Abstract

A system includes a first control system configured to operate at a first clock speed, a second control system configured to provide an output to the first control system and configured to operate at a second clock speed different from the first clock speed, and a synchronization module operatively connecting the first control module to the second control module and configured to synchronize the first control system and the second control system such that the output of the second control system is timed to synchronize with the first clock speed.

First claim

What is claimed is:

1. A system, comprising:
a first control system configured to operate at a first clock speed;
a second control system configured to provide an output to the first control system and configured to operate at a second clock speed different from the first clock speed;
a synchronization module operatively connecting the first control module to the second control module and configured to synchronize the first control system and the second control system such that the output of the second control system is timed to synchronize with the first clock speed; and
an electric motor operatively connected to the second control system;
wherein the system is configured to:
start a loop sample timer to sample the clock speed of the first control system or to track the clock speed of the first control system;
receive speed data regarding the speed of the electric motor;
calculate error of the speed of the electric motor as compared to a speed command;
generate a new duty cycle command for input into the first control system; and
input the new duty cycle command into the first control system upon completion of the loop sample timer.

2. The system of claim 1 , wherein the first control system includes a motor compensation controller for controlling speed of the electric motor.

3. The system of claim 2 , wherein the second control system includes a field-programmable gate array (FPGA).

4. The system of claim 3 , wherein the first clock speed is less than about 1 MHz.

5. The system of claim 4 , wherein the second clock speed is greater than about 1 MHz.

6. The system of claim 5 , wherein the first clock speed is about 100 Hz.

7. The system of claim 1 , wherein the synchronization module is implemented on one of the first control system, the second control system, or a state machine.

8. A method for synchronizing asynchronous control systems, comprising:
initializing an electric motor compensation to control speed of an electric motor; starting a loop sample timer to sample the clock speed of a motor control system or to track the clock speed of the motor control system;
receiving speed data regarding the speed of the electric motor;
calculating error of the speed of the motor as compared to a speed command;
generating a new duty cycle command for input; and
inputting the new duty cycle command upon completion of the loop sample timer.

9. The method of claim 8 , wherein receiving speed data includes determining the speed of the electric motor based on rotor position versus time data.

Assignees

• Hamilton Sundstrand Space Sys

Inventors

• Wichowski Robert P
• Hawes Kevin G
• Sears Patrick J
• Murray Sean K

Classifications

• G06F1/12

  Synchronisation of different clock signals {provided by a plurality of clock generators} · CPC title

• H02P5/526

  Electricity · mapped topic

• G05B19/0421 Primary

  Multiprocessor system · CPC title

• G05B2219/25484

  Synchronize microprocessor and connected, controlled state machine · CPC title

• H04L7/00

  Arrangements for synchronising receiver with transmitter {(synchronisation of generators of electric oscillations or pulses H03L7/00)} · CPC title