Semiconductor wafer composed of monocrystalline silicon and method for producing it

US9458554B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9458554-B2
Application numberUS-201313949342-A
CountryUS
Kind codeB2
Filing dateJul 24, 2013
Priority dateAug 8, 2012
Publication dateOct 4, 2016
Grant dateOct 4, 2016

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The invention relates to a semiconductor wafer of monocrystalline silicon, and to a method for producing it. The semiconductor wafer has a zone, DZ, which is free of BMD defects and extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer, and a region having BMD defects which extends from the DZ further into the bulk of the semiconductor wafer. A silicon single crystal is pulled by the Czochralski method and processed to form a polished monocrystalline silicon substrate wafer. The substrate wafer is treated by rapidly heating and cooling the substrate wafer, slowly heating the rapidly heated and cooled substrate wafer, and keeping the substrate wafer at a specific temperature and over a specific period.

First claim

Opening claim text (preview).

What is claimed is: 1. A monocrystalline silicon semiconductor wafer having a nitrogen concentration of not more than 1×10 12 atoms/cm 3 , and when subjected to defect delineation/optical microscopy comprises: a denuded zone (“DZ”) which extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer and which is free of BMD defects and has an averaged thickness of not less than 5 μm, and a region which adjoins the DZ and extends further into the bulk of the semiconductor wafer, the region having BMD defects having a size of not less than 50 nm, wherein a depth profile of the BMD defects in the region has a local maximum which is at a distance of not less than 20 μm and not more than 200 μm from the front side of the semiconductor wafer, and wherein the density of the BMD defects at the local maximum is not less than 2×10 10 /cm 3 . 2. A monocrystalline silicon semiconductor wafer, which is doped with nitrogen and hydrogen, and when subjected to defect delineation/optical microscopy comprises: a denuded zone (“DZ”) which extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer and which is free of BMD defects and has an averaged thickness of not less than 5 μm, and a region which adjoins the DZ and extends further into the bulk of the semiconductor wafer, the region BMD defects having a size of not less than 25 nm, wherein a depth profile of the BMD defects in the region has a first local maximum which is at a distance of not less than 20 μm and not more than 100 μm from the front side of the semiconductor wafer wherein the density of the BMD defects at the first local maximum is not less than 1.0×10 10 /cm 3 , and the depth profile of the BMD defects has a second local maximum which is at a distance of not less than 300 μm and not more than 500 μm from the front side of the semiconductor wafer, wherein the density of the BMD defects at the second local maximum is not less than 2×10 10 /cm 3 . 3. A method for producing a monocrystalline silicon semiconductor wafer of claim 1 , having a denuded zone (“DZ”) which is free of BMD defects, and having a region having BMD defects which adjoins the DZ, comprising: a) pulling a silicon single crystal by the Czochralski method; b) processing the single crystal to form a polished monocrystalline substrate wafer which, from a center as far as an edge, consists of an N region or has COP defects, the size of the COP defects being more than 20 nm and having an average density of less than 2.5×10 5 /cm 3 , the substrate wafer having a nitrogen concentration of not more than 1×10 12 atoms/cm 3 and an oxygen concentration of not less than 5.2×10 17 atoms/cm 3 and not more than 6.0×10 17 atoms/cm 3 ; c) rapidly heating and cooling the substrate wafer in an atmosphere which substantially consists of NH 3 and argon in a volume ratio of not less than 1:25 and not more than 1:5 to a temperature of not less than 1165° C. and not more than 1180° C. and with a heating rate and a cooling rate of not less than 30 K/s and not more than 50 K/s; d) slowly heating the rapidly heated and cooled substrate wafer from step c) from a temperature of not less than 500° C. and not more than 550° C. to a temperature of not less than 930° C. and not more than 1000° C. with a heating rate of not less than 0.5 K/min and not more than 1.5 K/min; and e) keeping the substrate wafer at the temperature of not less than 930° C. and not more than 1000° C. over a period of not less than 7 hours and not more than 10 hours. 4. A method for producing a monocrystalline silicon semiconductor wafer of claim 2 having a denuded zone (“DZ”) which is free of BMD defects, and having a region having BMD defects which adjoins the DZ, comprising: a) pulling a silicon single crystal in accordance with the Czochralski method, wherein the growing single crystal is doped with nitrogen and pulled in an atmosphere containing hydrogen; b) processing the single crystal to form a polished monocrystalline substrate wafer composed of silicon which, from a center as far as an edge, consists of an N region or has COP defects, the size of which is more than 20 nm and the average density of which is less than 2.5×10 5 /cm 3 , the substrate wafer having a nitrogen concentration of not less than 3×10 13 atoms/cm 3 and not more than 3×10 14 atoms/cm 3 and an oxygen concentration of not less than 5.0×10 17 atoms/cm 3 and not more than 5.8×10 17 atoms/cm 3 ; c) rapidly heating and cooling the substrate wafer in an atmosphere which substantially consists of NH 3 and argon in a volume ratio of not less than 1:25 and not more than 1:5 to a temperature of not less than 1165° C. and not more than 1180° C. and with a heating rate and a cooling rate of not less than 30 K/s and not more than 50 K/s; d) slowly heating the rapidly heated and cooled substrate wafer from step c) from a temperature of not less than 500° C. and not more than 550° C. to a temperature of not less than 900° C. and not more than 1000° C. with a heating rate of not less than 3 K/min and not more than 7 K/min; and keeping the substrate wafer at the temperature of not less than 900° C. and not more than 1000° C. over a period of not less than 5 hours and not more than 8 hours. 5. The method of claim 3 , wherein the method comprises no additional thermal treatments of the substrate wafer which subject the substrate wafer to temperatures of more than 1000° C. 6. The method of claim 4 , wherein the method comprises no additional thermal treatments of the substrate wafer which subject the substrate wafer to temperatures of more than 1000° C. 7. The method of claim 4 , wherein the growing single crystal is pulled in an atmosphere containing hydrogen having a partial pressure of not less than 10 Pa and not more than 80 Pa. 8. The method of claim 6 , wherein the growing single crystal is pulled in an atmosphere containing hydrogen having a partial pressure of not less than 10 Pa and not more than 80 Pa.

Assignees

Inventors

Classifications

  • Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body · CPC title

  • Gettering within semiconductor bodies · CPC title

  • H10P14/20Primary

    of semiconductor materials · CPC title

  • being Group IV materials, e.g. B-doped Si or undoped Ge · CPC title

  • Crystalline structures · CPC title

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What does patent US9458554B2 cover?
The invention relates to a semiconductor wafer of monocrystalline silicon, and to a method for producing it. The semiconductor wafer has a zone, DZ, which is free of BMD defects and extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer, and a region having BMD defects which extends from the DZ further into the bulk of the semiconductor wafer. A silicon si…
Who is the assignee on this patent?
Siltronic Ag
What technology area does this patent fall under?
Primary CPC classification H10P14/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 04 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).