Ecological method for constructing circuit boards

US9456507B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9456507-B2
Application numberUS-201314047323-A
CountryUS
Kind codeB2
Filing dateOct 7, 2013
Priority dateOct 7, 2013
Publication dateSep 27, 2016
Grant dateSep 27, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for fabrication of a circuit board using the disclosed embodiments relies on a CAD model of a multilayer circuit board with conductive elements defined by layer. A first granular conductive material layer is introduced into a mold. A fusion process element traverses across the mold to fuse selected portions of the first granular conductive material layer forming first layer conductive elements. An additional granular conductive material layer is introduced into the mold over the fused selected portions of the first layer and unfused portions of the first layer. The fusion process element is then traversed across the mold to fuse selected portions of the additional granular conductive material layer forming an additional layer of conductive elements. Unfused granular conductive material is then purged from the fused first conductive elements and additional conductive layer elements. A dielectric material is then infused into a structure formed by the fused first conductive elements and additional conductive layer elements.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for fabrication of a circuit board comprising: preparing a Computer Aided Design (CAD) model of a multilayer circuit board with conductive elements defined by layer for a plurality of layers; introducing a first granular conductive material layer into a mold; traversing a laser sintering head across the mold to sinter selected portions of the first granular conductive material layer forming first layer conductive elements as defined by the CAD model for a first layer in the plurality of layers; introducing an additional granular conductive material layer into the mold over the sintered selected portions of the first layer and un-sintered portions of the first layer; traversing the laser sintering head across the mold to sinter selected portions of the additional granular conductive material layer forming additional layer conductive elements as defined by the CAD model for an additional layer in the plurality of layers, the traversing speed and laser sintering power controlled to avoid fusing of un-sintered material in the first layer; removing un-sintered granular conductive material from the sintered first conductive elements and additional conductive layer elements, wherein the step of removing un-sintered granual conductive material comprises pneumatic purging; infusing a dielectric material into a structure formed by the sintered first conductive elements and additional conductive layer elements to fill space from which the un-sintered granular conductive material was removed. 2. The method as defined in claim 1 further comprising curing the dielectric material. 3. The method as defined in claim 1 wherein the step of introducing an additional granular conductive material layer and the step of traversing the laser sintering head across the mold to sinter selected portions of the additional granular conductive material layer are repeated to complete all layers of the plurality of layers defined in the CAD model. 4. A method for fabrication of a circuit board comprising: preparing a Computer Aided Design (CAD) model of a multilayer circuit board with conductive elements defined by layer for a plurality of layers; introducing a first granular conductive material layer into a mold; traversing a laser sintering head across the mold to sinter selected portions of the first granular conductive material layer forming first layer conductive elements as defined by the CAD model for a first layer in the plurality of layers; introducing an additional granular conductive material layer into the mold over the sintered selected portions of the first layer and un-sintered portions of the first layer; traversing the laser sintering head across the mold to sinter selected portions of the additional granular conductive material layer forming additional layer conductive elements as defined by the CAD model for an additional layer in the plurality of layers, the traversing speed and laser sintering power controlled to avoid fusing of un-sintered material in the first layer; removing un-sintered granular conductive material from the sintered first conductive elements and additional conductive layer elements, wherein the step of removing un-sintered granular conductive material comprises vibratory purging; infusing a dielectric material into a structure formed by the sintered first conductive elements and additional conductive layer elements to fill space from which the un-sintered granular conductive material was removed. 5. The method as defined in claim 4 further comprising curing the dielectric material. 6. The method as defined in claim 4 wherein the step of introducing an additional granular conductive, material layer and the step of traversing the laser sintering head across the mold to sinter selected portions of the additional granular conductive material layer are repeated to complete all layers of the plurality of layers defined in the CAD model.

Assignees

Inventors

Classifications

  • Manufacturing circuit on or in base · CPC title

  • H05K3/4673Primary

    Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer (similar methods for protective coatings H05K3/28) · CPC title

  • with sintering of base · CPC title

  • Multilayer circuits · CPC title

  • Conductor · CPC title

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Frequently asked questions

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What does patent US9456507B2 cover?
A method for fabrication of a circuit board using the disclosed embodiments relies on a CAD model of a multilayer circuit board with conductive elements defined by layer. A first granular conductive material layer is introduced into a mold. A fusion process element traverses across the mold to fuse selected portions of the first granular conductive material layer forming first layer conductive …
Who is the assignee on this patent?
Boeing Co
What technology area does this patent fall under?
Primary CPC classification H05K3/4673. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).