Semiconductor circuit and amplifier circuit

Patent metadata

Field	Value
Publication number	US-9455676-B2
Application number	US-201514665374-A
Country	US
Kind code	B2
Filing date	Mar 23, 2015
Priority date	Mar 31, 2014
Publication date	Sep 27, 2016
Grant date	Sep 27, 2016

Abstract

An amplifier circuit outputs a control signal for controlling a control target circuit and receives input of a feedback signal from the control target circuit. The amplifier circuit and the control target circuit constitute a feedback loop that includes a plurality of poles. A semiconductor capacitive element is provided for phase compensation in the feedback loop. The amplifier circuit includes an output branch that includes a first transistor having a first current terminal from which the control signal is output and a second current terminal connected to a power supply potential, and a branch that is connected in parallel to the output branch and includes a cascode circuit. The cascode circuit includes a second transistor having third and fourth current terminals, and a third transistor having fifth and sixth current terminals. The fourth and fifth current terminals are connected to each other. The semiconductor capacitive element that obtains the Miller effect is connected between the control target circuit and the fourth and fifth current terminals.

First claim

What is claimed is:

1. A semiconductor circuit comprising:
a control target circuit;
an amplifier circuit that outputs a control signal for controlling the control target circuit and to which a feedback signal from the control target circuit is input; and the amplifier circuit and the control target circuit constituting a feedback loop that includes a plurality of poles,
a semiconductor capacitive element for a phase compensation in the feedback loop, wherein the amplifier circuit includes:
an output branch including a first transistor having a first current terminal from which the control signal is output and a second current terminal that is connected to a power supply potential; and
a branch that is connected in parallel to the output branch and includes a cascode circuit,
the cascode circuit includes a second transistor having third and fourth current terminals, and a third transistor having fifth and sixth current terminals,
the fourth current terminal and the fifth current terminals are connected to each other, and the semiconductor capacitive element that obtains a Miller effect is connected between the control target circuit and the fourth and fifth current terminals.

2. The semiconductor circuit according to claim 1 , wherein
the output branch further includes a fourth transistor having seventh and eighth current terminals, the seventh current terminal being connected to the first current terminal of the first transistor,
the branch including the cascode circuit further includes a fifth transistor having ninth and tenth current terminals, the ninth current terminal being connected to the third current terminal of the second transistor, and
the eighth current terminal of the fourth transistor and the tenth current terminal of the fifth transistor are connected to each other.

3. The semiconductor circuit according to claim 1 , wherein
the control target circuit is a driver circuit that drives a load, and
the amplifier circuit controls an output of the driver circuit.

4. The semiconductor circuit according to claim 3 , wherein
the driver circuit includes a current source or voltage source for controlling the output of the driver circuit, and
the amplifier circuit outputs the control signal to a control terminal of the current source or the voltage source.

5. The semiconductor circuit according to claim 4 , wherein
the output of the driver circuit is a differential output, and
the feedback signal is one output potential of the differential output, the other output potential of the differential output, or an intermediate potential of the differential output.

6. The semiconductor circuit according to claim 4 , wherein
the driver circuit further includes a switching circuit between an output terminal of the driver circuit and the current source or the voltage source, and
one end of the semiconductor capacitive element is connected to a terminal of the current source or the voltage source, the terminal being on a side of the switching circuit.

7. The semiconductor circuit according to claim 3 , wherein
the driver circuit includes:
a differential output terminal having first and second output terminals;
high potential-side first and second switching devices; and
low potential-side third and fourth switching devices,
one end of the high potential-side first switching device and one end of the high potential-side second switching device are connected to each other,
one end of the low potential-side third switching device and one end of the low potential-side fourth switching device are connected to each other,
the other end of the high potential-side first switching device and the other end of the low potential-side third switching device are connected to the first output terminal, and
the other end of the high potential-side second switching device and the other end of the low potential-side fourth switching device are connected to the second output terminal.

8. An amplifier circuit that is included in the semiconductor circuit according to claim 1 .

Assignees

• Megachips Corp

Inventors

• Nishizawa yuuki

Classifications

• H03F2203/45052

  the cascode stage of the cascode differential amplifier being controlled by a controlling signal, which controlling signal can also be the input signal · CPC title

• H03F2203/45264

  the dif amp comprising frequency or phase stabilisation means · CPC title

• H03F3/45632

  in differential amplifiers with FET transistors as the active amplifying circuit (H03F3/4578 takes precedence) · CPC title

• H03F3/45076 Primary

  characterised by the way of implementation of the active amplifying circuit in the differential amplifier · CPC title

• H03F1/14 Primary

  by use of neutralising means · CPC title