Apparatuses and methods for performing logical operations using sensing circuitry
US-2015357008-A1 · Dec 10, 2015 · US
Shared gate fed sense amplifier
US9455000B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9455000-B2 |
| Application number | US-201514624605-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 18, 2015 |
| Priority date | Feb 18, 2015 |
| Publication date | Sep 27, 2016 |
| Grant date | Sep 27, 2016 |
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Abstract
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A first plurality of storage cells may be coupled to a first pair of data lines, and a second plurality of storage cells may be coupled to a second pair of data lines. Each storage cell in the first plurality of storage cells may be configured to generate a first output signal on the first pair of data lines in response to an assertion of a respective one of first plurality of selection signals, and each storage cell in the second plurality of storage cells may be configured to generate a second output signal on the second pair of data lines in response to the assertion of a respective one of a second plurality of selection signals. Circuitry may assert a given selection signal from either the first or second plurality of selection signals. An amplifier circuit may amplify either the first or second output signal.
First claim
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What is claimed is: 1. An apparatus, comprising: a plurality of data storage cells, wherein a first subset of the plurality of data storage cells is coupled to a first pair of data lines, wherein a second subset of the plurality of data storage cells is coupled to a second pair of data lines, wherein the second subset of data cells is different than the first subset of data cells; and wherein each data storage cell of the first subset of the plurality of data storage cells is co…
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Frequently asked questions
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- What does patent US9455000B2 cover?
- A first plurality of storage cells may be coupled to a first pair of data lines, and a second plurality of storage cells may be coupled to a second pair of data lines. Each storage cell in the first plurality of storage cells may be configured to generate a first output signal on the first pair of data lines in response to an assertion of a respective one of first plurality of selection signals…
- Who is the assignee on this patent?
- Apple Inc
- What technology area does this patent fall under?
- Primary CPC classification G11C7/065. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Sep 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).