Active peak power management of a high performance embedded microprocessor cluster

Patent metadata

Field	Value
Publication number	US-9454196-B2
Application number	US-201313929331-A
Country	US
Kind code	B2
Filing date	Jun 27, 2013
Priority date	Jun 27, 2013
Publication date	Sep 27, 2016
Grant date	Sep 27, 2016

Abstract

In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.

First claim

What is claimed is:

1. A system, comprising:
at least one voltage controller, wherein at least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition;
a capacitor coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the capacitor to supply additional current when the predetermined condition occurs, wherein when the increase in current is no longer required the capacitor is disengaged, and wherein the capacitor is charged when disengaged until a predetermined capacity; and
a power management unit sensing, during use, oscillations resulting from changes in current consumption, and wherein the power management unit disengages the capacitor in response to the sensed oscillations such that the sensed oscillations are inhibited.

2. The system of claim 1 , wherein the predetermined condition comprises a peak power event resulting in a decrease in a power supply voltage.

3. The system of claim 1 , further comprising an analog control which assesses, during use, an occurrence of the predetermined condition.

4. The system of claim 1 , further comprising an analog control which assesses, during use, an occurrence of the predetermined condition, wherein the predetermined condition comprises a voltage decrease.

5. The system of claim 1 , further comprising a digital control which assesses, during use, an occurrence of the predetermined condition.

6. The system of claim 1 , further comprising a digital control which assesses, during use, an occurrence of the predetermined condition, wherein the predetermined condition comprises incoming high power instructions.

7. The system of claim 1 , wherein the capacitor is charged when disengaged until a predetermined capacity at a rate to inhibit an increase in an average peak power requirement of the system.

8. The system of claim 7 , further comprising at least one resistor which controls, during use, the charge rate of the capacitor to reduce a load of recharging the capacitor on a power supply.

9. The system of claim 1 , wherein at least one of the voltage controllers assesses a voltage level of the capacitor, wherein a power management unit notifies the system when the voltage controller assesses insufficient voltage in response to the predetermined condition.

10. The system of claim 1 , further comprising a power management unit configured to transmit a request to change a voltage supplied within the system to a new voltage level in response to the predetermined condition.

11. A apparatus, comprising:
a first CPU;
a second CPU;
a first voltage controller, wherein the first voltage controller may assess, during use, an occurrence of a first predetermined condition; and
a first capacitor coupled to the first voltage controller such that the first voltage controller engages the first capacitor to supply additional current to the first CPU when the first predetermined condition occurs, wherein when the increase in current is no longer required the first capacitor is disengaged, and wherein the first capacitor is charged when disengaged until a first predetermined capacity;
a second voltage controller, wherein the second voltage controller may assess, during use, an occurrence of a second predetermined condition;
a second capacitor coupled to the second voltage controller such that the second voltage controller engages the second capacitor to supply additional current to the second CPU when the second predetermined condition occurs, wherein when the increase in current is no longer required the second capacitor is disengaged, and wherein the second capacitor is charged when disengaged until a second predetermined capacity; and
a power management unit configured to transmit a request to change a voltage supplied within a system to a new voltage level in response to the first and/or second predetermined condition, wherein the power management unit senses, during use, oscillations resulting from changes in current consumption, and wherein the power management unit disengages at least one of the first and the second capacitor in response to the sensed oscillations such that the sensed oscillations are inhibited.

12. A method, comprising:
assessing an occurrence of a predetermined condition using at least one voltage controller, wherein at least one of the voltage controllers is coupled to a capacitor;
engaging the capacitor to supply additional current when the predetermined condition occurs;
disengaging the capacitor when the increase in current is no longer required;
charging the capacitor when disengaged until a predetermined capacity;
sensing oscillations resulting from changes in current consumption using a power management unit; and
disengaging, using the power management unit, the capacitor in response to the sensed oscillations such that the sensed oscillations are inhibited.

13. The method of claim 12 , further comprising assessing an occurrence of the predetermined condition using an analog control.

14. The method of claim 12 , further comprising assessing an occurrence of the predetermined condition using an analog control, wherein the predetermined condition comprises a voltage decrease.

15. The method of claim 12 , further comprising assessing an occurrence of the predetermined condition using a digital control.

16. The method of claim 12 , further comprising assessing an occurrence of the predetermined condition using a digital control, wherein the predetermined condition comprises incoming high power instructions.

17. The method of claim 12 , further comprising charging the capacitor when disengaged until a predetermined capacity at a rate to inhibit an increase in an average peak power requirement of a system.

18. The method of claim 12 , further comprising:
assessing a voltage level of the capacitor using the voltage controller; and
notifying, using a power management unit, a system when the voltage controller assesses insufficient voltage in response to the predetermined condition.

Assignees

• Apple Inc

Inventors

• Knoth Matthias
• Kumar Rohit
• Smith Eric
• Luh Louis

Classifications

• H02J7/345

  using capacitors as storage or buffering devices · CPC title

• H02J1/10

  Parallel operation of DC sources · CPC title

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• H02J1/02 Primary

  Arrangements for reducing harmonics or ripples · CPC title

• Y10T307/527

  Cross-Sectional Technologies · mapped topic