Audio processing apparatus and method having echo canceling mechanism
US-2024056090-A1 · Feb 15, 2024 · US
US9450596B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9450596-B2 |
| Application number | US-201113228502-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 9, 2011 |
| Priority date | May 9, 2011 |
| Publication date | Sep 20, 2016 |
| Grant date | Sep 20, 2016 |
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Successive approximation register (SAR) and ramp analog to digital conversion (ADC) methods, systems, and apparatus are disclosed. An analog voltage signal may be converted into a multiple bit digital value by generating bits of the multiple bit digital value by performing a SAR conversion on the analog voltage signal, where the bits corresponding to a SAR voltage level, and generating other bits of the multiple bit digital value by performing one or more ramp conversions on the analog voltage signal, the ramp conversion comparing the analog voltage signal to a ramp of voltage levels based on the SAR voltage level. The SAR and ramp ADC can provide multi-sampling using one SAR conversion and multiple ramp conversions. The SAR can set the voltage level of a first ramp of a multiple ramp conversion, which can then be used to preset the voltage level prior to subsequent ramps.
Opening claim text (preview).
What is claimed: 1. An analog to digital conversion circuit that converts an analog voltage signal into a multiple bit digital value representing the analog voltage signal, the circuit comprising: successive approximation register (SAR) conversion circuitry including a comparator configured to receive the analog voltage signal, wherein the comparator includes an input for receiving the analog voltage signal, at least one other input, and at least one output, the SAR conversion cir…
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