Manufacturing method of semiconductor film, manufacturing method of semiconductor device, and manufacturing method of photoelectric conversion device

Patent metadata

Field	Value
Publication number	US-9450139-B2
Application number	US-201514978463-A
Country	US
Kind code	B2
Filing date	Dec 22, 2015
Priority date	Jul 2, 2010
Publication date	Sep 20, 2016
Grant date	Sep 20, 2016

Abstract

A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

First claim

What is claimed is:

1. A manufacturing method of a photoelectric conversion device, comprising the steps of:
forming a first electrode over a substrate;
forming a first semiconductor film over the first electrode, the first semiconductor film having a first conductivity type;
forming a second semiconductor film over the first semiconductor film, the second semiconductor film having a function of photoelectric conversion;
forming a third semiconductor film over the second semiconductor film, the third semiconductor film having a second conductivity type; and
forming a second electrode over the third semiconductor film,
wherein at least one of the first semiconductor film and the third semiconductor film comprises an amorphous semiconductor film formed by a method comprising the steps of:
introducing a mixture of a deposition gas containing silicon and a gas containing an impurity element as a source gas into a reaction chamber;
setting pressure and an electrode distance in the reaction chamber so that discharge inception voltage is minimum discharge inception voltage in a Paschen curve; and
applying pulse-modulated discharge inception voltage to electrodes wherein the pulse-modulated discharge inception voltage is obtained by pulse-modulating the discharge inception voltage.

2. The manufacturing method according to claim 1 , wherein the source gas further comprises hydrogen.

3. The manufacturing method according to claim 1 , wherein the discharge inception voltage is pulse-modulated at a frequency higher than or equal to 1 kHz and lower than or equal to 12.5 kHz.

4. The manufacturing method according to claim 1 , wherein the second semiconductor film comprises a crystalline semiconductor.

Assignees

• Semiconductor Energy Lab

Inventors

• Tanaka Tetsuhiro
• Kato Erika

Classifications

• H10P14/3454

  Amorphous · CPC title

• H10P14/3442

  N-type · CPC title

• H10P14/3411 Primary

  Silicon, silicon germanium or germanium · CPC title

• H10P14/24 Primary

  using chemical vapour deposition [CVD] · CPC title

• Y02E10/544

  Solar cells from Group III-V materials · CPC title