Methods for doping fin field-effect transistors
US-9209280-B2 · Dec 8, 2015 · US
Semiconductor arrangements and methods of manufacturing the same
US9450100B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9450100-B2 |
| Application number | US-201314763407-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 12, 2013 |
| Priority date | Feb 8, 2013 |
| Publication date | Sep 20, 2016 |
| Grant date | Sep 20, 2016 |
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Abstract
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A semiconductor arrangement that includes: a substrate; a back gate formed on the substrate; fins formed on opposite sides of the back gate; and back gate dielectric layers interposed between the back gate and the respective fins. The back gate has opposite end portions recessed with respect to a middle portion thereof between the end portions, so that an overlap area between each of the end portions and each of the fins is smaller than an overlap area between the middle portion and the fin.
First claim
Opening claim text (preview).
I claim: 1. A semiconductor arrangement, comprising: a substrate; a back gate formed on the substrate; fins formed on opposite sides of the back gate; and back gate dielectric layers interposed between the back gate and the respective fins, wherein the back gate has opposite end portions recessed with respect to a middle portion thereof between the end portions, so that an overlap area between each of the end portions and each of the fins is smaller than an overlap area be…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9450100B2 cover?
- A semiconductor arrangement that includes: a substrate; a back gate formed on the substrate; fins formed on opposite sides of the back gate; and back gate dielectric layers interposed between the back gate and the respective fins. The back gate has opposite end portions recessed with respect to a middle portion thereof between the end portions, so that an overlap area between each of the end po…
- Who is the assignee on this patent?
- Inst Of Microelectronics Cas
- What technology area does this patent fall under?
- Primary CPC classification H10D30/6215. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).