Circuitry to protect a test instrument

US9448274B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9448274-B2
Application numberUS-201414254363-A
CountryUS
Kind codeB2
Filing dateApr 16, 2014
Priority dateApr 16, 2014
Publication dateSep 20, 2016
Grant dateSep 20, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Controlling a test instrument may include: determining a first value corresponding to power output by the test instrument; determining a second value based on the first value, where the second value corresponds to an amount of energy consumed by the test instrument; and placing at least part of the test instrument in a high-impedance state when the second value exceeds a threshold.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of controlling a test instrument; comprising: determining a first value corresponding to power output by the test instrument; determining a second value based on the first value, the second value corresponding to an amount of energy consumed by the test instrument; and placing at least part of the test instrument in a high-impedance state when the second value exceeds a threshold; wherein the test instrument comprises multiple channels; and wherein the following are performed for a channel in the test instrument: determining the first value, determining the second value, and placing the test instrument in the high-impedance state. 2. The method of claim 1 , wherein determining the first value comprises obtaining a product of an input voltage value and a voltage corresponding to an input current value and, based on the product, producing an output voltage corresponding to the first value. 3. The method of claim 2 , wherein determining the second value comprises: generating an output current based on the output voltage; and integrating the output current over time to produce the second value. 4. The method of claim 3 , further comprising: comparing the second value to the threshold; and outputting a comparison value based on the comparison; wherein the test instrument is placed in the high-impedance state by a latch in response to receipt of the comparison value, the latch outputting a control signal to place the test instrument in the high-impedance state. 5. The method of claim 4 , wherein the threshold is a first threshold; and wherein the method further comprises: following placement of the test instrument into the high-impedance state, lowering the power output by the test instrument so that the output current is less than a fixed current; performing a reverse integration over time based on the fixed current to produce a third value; comparing the third value to a second threshold; and placing at least part of the test instrument in an operational state when, based on the comparing, the third value exceeds the second threshold. 6. The method of claim 5 , wherein comparing the third value to the second threshold results in a second comparison value; and wherein the test instrument is returned to the normal operational state by a resetting of the latch in response to receipt of the second comparison value, the latch outputting a control signal to place the test instrument in the operational state. 7. The method of claim 2 , wherein the input voltage is based on a voltage across terminals of a power field-effect transistor; and wherein the input current is based on voltage across terminals of a current sense resistor. 8. The method of claim 2 , wherein a multiplier circuit is used to determine the first value corresponding to an output voltage; wherein the output voltage is output to a resistor to produce a current that exceeds a fixed current; and wherein the second value is obtained by integrating the current over time. 9. The method of claim 1 , further comprising: causing the test instrument to exit the high-impedance state following a decrease in the power output by the test instrument. 10. The method of claim 1 , further comprising: following placing at least part of the test instrument in a high-impedance state, controlling the test instrument manually or programmatically to place the test instrument into an operational state. 11. Circuitry to control a test instrument, comprising: a multiplier circuit to receive an input voltage and a voltage corresponding to an input current and to provide an output voltage representing power output of the test instrument; an integrator circuit to output an integrated voltage based on a current corresponding to the output voltage, the integrated voltage representing energy consumed by the test instrument; a comparator circuit to perform a comparison of the integrated voltage to a threshold, and to output a result signal based on the comparison; and a latch to output a control signal to the test instrument based on the result signal, the control signal to place at least one of multiple channels of the test instrument in a high-impedance state. 12. The circuitry of claim 11 , further comprising: a resistor to receive the output voltage, the current corresponding to the output voltage passing through the first resistor as a result of the output voltage received by the resistor. 13. The circuitry of claim 12 , wherein the resistor is a first resistor, the current corresponding to the output voltage is a first current, the integrated voltage is a first integrated voltage, the threshold is a first threshold, and the control signal is a first control signal; and wherein the circuitry comprises: a second resistor connected to a voltage source, a second current passing through the second resistor; wherein, in a case that the second current is greater than the first current, the integrator circuit is configured to output a second integrated voltage based on the second current; wherein the comparator circuit is configured to perform a comparison of the second integrated voltage to a second threshold, and to output a second result signal based on the comparison; and wherein the latch is configured to output a second control signal to the test instrument based on the second result signal. 14. The circuitry of claim 13 , wherein the first control signal is to put the at least one of multiple channels of the test instrument into the high-impedance state, and the second control signal is to put the at least part of the test instrument into operational mode. 15. The circuitry of claim 11 , further comprising: a power field-effect transistor across which a voltage corresponding to the input voltage is measured; and a resistor through which a current corresponding to the input current is measured. 16. The circuitry of claim 11 , further comprising: a power stage to output power from the instrument to a device under test, the power stage being configured to receive, and to respond to, the control signal. 17. The circuitry of claim 11 , wherein the integrator circuit comprises an operational amplifier. 18. Circuitry to control a test instrument, comprising: an integrator circuit to output an integrated voltage based on a current corresponding primarily to an output power of the test instrument when the output power of the test instrument is above a threshold, the integrated voltage representing energy consumed by the test instrument; a comparator circuit to perform a comparison of the integrated voltage to a threshold, and to output a result signal based on the comparison; and a latch to output a control signal to the test instrument based on the result signal, the control signal to place at least one of multiple channels of the test instrument in a high-impedance state.

Assignees

Inventors

Classifications

  • Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments · CPC title

  • by measuring current and voltage (G01R21/08 - G01R21/133 take precedence) · CPC title

  • using analogue techniques · CPC title

  • Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title

  • G01R31/28Primary

    Testing of electronic circuits, e.g. by signal tracer ({EMC, EMP or similar testing of electronic circuits G01R31/002;} testing for short-circuits, discontinuities, leakage or incorrect line connection G01R31/50; checking computers {or computer components} G06F11/00; checking static stores for correct operation G11C29/00 {; testing receivers or transmitters of transmission systems H04B17/00}) · CPC title

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What does patent US9448274B2 cover?
Controlling a test instrument may include: determining a first value corresponding to power output by the test instrument; determining a second value based on the first value, where the second value corresponds to an amount of energy consumed by the test instrument; and placing at least part of the test instrument in a high-impedance state when the second value exceeds a threshold.
Who is the assignee on this patent?
Teradyne Inc
What technology area does this patent fall under?
Primary CPC classification G01R31/28. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).