Capacitive load drive circuit

Patent metadata

Field	Value
Publication number	US-9446583-B2
Application number	US-201514918222-A
Country	US
Kind code	B2
Filing date	Oct 20, 2015
Priority date	Mar 22, 2013
Publication date	Sep 20, 2016
Grant date	Sep 20, 2016

Abstract

A capacitive load drive circuit, which may be embodied in a printer, includes capacitive elements; a first circuit substrate, on which is installed a control signal supply unit that generates control signals; a second circuit substrate, on which is installed a circuit that charges or discharges the capacitive elements according to the control signals; and a flexible flat cable, on which is formed wirings including control wiring, which transmits the control signals from the first to the second circuit substrate, and a wiring, which supplies power supply and ground voltages to the second circuit substrate. A total path length of the wirings between the first and second circuit substrates is shorter than the total path length of the wiring between the second circuit substrate and each of the capacitive elements.

First claim

What is claimed is:

1. A capacitive load drive circuit, comprising:
capacitive elements;
a first circuit substrate, on which is installed a control signal supply unit that generates control signals;
a second circuit substrate, on which is installed a circuit that charges or discharges each of the capacitive elements according to the control signals; and
a flexible flat cable, on which is formed a plurality of wirings including control wiring, which transmits the control signals from the first circuit substrate to the second circuit substrate, and a wiring, which supplies a power supply voltage and a ground voltage to the second circuit substrate,
wherein a total path length of the plurality of wirings between the first circuit substrate and the second circuit substrate is shorter than the total path length of the wiring between the second circuit substrate and each of the capacitive elements.

2. The capacitive load drive circuit according to claim 1 ,
wherein a booster circuit that generates a plurality of voltages, and connection path selecting units that selectively supply the plurality of voltages generated by the booster circuit to the capacitive elements according to the control signals are installed on the second circuit substrate.

3. The capacitive load drive circuit according to claim 2 ,
wherein the connection path selecting units electrically connect the capacitive elements and the booster circuit using a first signal path or a second signal path according to the first signal path, to which a first voltage generated by the booster circuit is applied, the second signal path, to which the second voltage generated by the booster circuit that is higher than the first voltage is applied, voltages of the control signals, and the voltages held by the capacitive elements.

4. The capacitive load drive circuit according to claim 3 , further comprising:
detection units, which are installed on the second circuit substrate, and detect whether or not the voltages held by the capacitive elements are lower than the first voltage, or, whether or not the voltages held by the capacitive elements are equal to or higher than the first voltage and lower than the second voltage.

5. The capacitive load drive circuit according to claim 3 ,
wherein, in relation to the capacitive elements holding a voltage that is lower than the first voltage, the connection path selecting units control charges to be charged to the capacitive elements via the first signal path according to the voltages of the control signals, and
wherein, in relation to the capacitive elements holding a voltage that is equal to or higher than the first voltage and lower than the second voltage, the connection path selecting units control the charges to be discharged from the capacitive elements via the first signal path, or, control the charges to be charged to the capacitive elements via the second signal path according to the voltages of the control signals.

Assignees

• Seiko Epson Corp

Inventors

• Otsuka Shuji
• Kiyuna Tadashi
• Asanuma Toshifumi

Classifications

• B41J2/04541 Primary

  Specific driving circuit · CPC title

• B41J2/0455

  Details of switching sections of circuit, e.g. transistors · CPC title

• B41J2/04581

  controlling heads based on piezoelectric elements · CPC title

• B41J2/04548

  Details of power line section of control circuit · CPC title

• B41J2/14233

  of film type, deformed by bending and disposed on a diaphragm · CPC title