RF power amplifier with total radiated power stabilization

Patent metadata

Field	Value
Publication number	US-9444411-B2
Application number	US-201414218953-A
Country	US
Kind code	B2
Filing date	Mar 18, 2014
Priority date	Mar 15, 2013
Publication date	Sep 13, 2016
Grant date	Sep 13, 2016

Abstract

A radio frequency (RF) amplification circuit and a closed-loop amplitude linearization circuit are disclosed. The RF amplification circuit amplifies an RF signal to generate an amplified RF signal. The RF amplification circuit and the closed-loop amplitude linearization circuit form a fast control loop and a slow control loop. The slow control loop estimates a total radiated power (TRP) from the RF amplification circuit to create a TRP estimate using a representation of the amplified RF signal, and controls a fast loop gain of the fast control loop based on the TRP estimate. The fast control loop applies a gain adjustment to the RF amplification circuit based on the fast loop gain and a difference between a target reference amplitude and a measured feedback amplitude. The gain adjustment controls amplitude distortion in the RF amplification circuit. The fast loop gain controls TRP-drift in the RF amplification circuit.

First claim

What is claimed is:

1. Circuitry comprising an IC package, which comprises:
a package interface coupled to upstream RF system circuitry;
an RF amplification circuit configured to amplify an RF signal to generate an amplified RF signal; and
a closed-loop gain linearization circuit, such that the RF amplification circuit and the closed-loop gain linearization circuit form a fast control loop and a slow control loop, wherein:
the slow control loop is configured to:
estimate a total radiated power (TRP) from the RF amplification circuit to create a TRP estimate using a representation of the amplified RF signal; and
control a fast loop gain of the fast control loop based on the TRP estimate; and

the fast control loop is configured to apply a gain adjustment to the RF amplification circuit based on the fast loop gain and a difference between a target reference amplitude and a measured feedback amplitude, wherein the gain adjustment controls amplitude distortion in the RF amplification circuit and the fast loop gain controls TRP-drift in the RF amplification circuit, wherein the TRP-drift is at least partially based on Voltage Standing Wave Ratio (VSWR) variations presented to an output from the RF amplification circuit.

2. The circuitry of claim 1 wherein the package interface is configured to receive the RF signal and provide the amplified RF signal, wherein the slow control loop is further configured to endogenously estimate the TRP from the RF amplification circuit.

3. The circuitry of claim 1 wherein the amplitude distortion is at least partially based on amplitude variations of the RF signal.

4. The circuitry of claim 1 wherein a bandwidth of the slow control loop is less than about 100 hertz and a bandwidth of the fast control loop is greater than about 100 hertz and less than about one gigahertz.

5. The circuitry of claim 1 wherein the closed-loop gain linearization circuit comprises a gain error detection circuit configured to:
receive an amplitude reference signal and compute the target reference amplitude;
receive an amplitude feedback signal and compute the measured feedback amplitude; and
provide a gain error signal based on an amplitude difference between the amplitude reference signal and the amplitude feedback signal, such that the gain adjustment to the RF amplification circuit is further based on the gain error signal.

6. The circuitry of claim 5 wherein the closed-loop gain linearization circuit further comprises a variable gain RF amplifier configured to:
receive a first signal, which is representative of an amplified RF signal current of the amplified RF signal; and
provide an amplified feedback signal based on amplifying the first signal, wherein:
the amplitude feedback signal is based on the amplified feedback signal; and
a gain of the variable gain RF amplifier is based on the fast loop gain control signal.

7. The circuitry of claim 6 wherein the closed-loop gain linearization circuit further comprises a first harmonic filter configured to receive and filter the amplified feedback signal to provide a feedback signal, such that the amplitude feedback signal is further based on the feedback signal.

8. The circuitry of claim 5 wherein the closed-loop gain linearization circuit further comprises TRP control circuitry configured to:
estimate the TRP using a first signal and a second signal to provide the TRP estimate, wherein the amplified RF signal has an amplified RF signal voltage and an amplified RF signal current, such that the first signal is representative of the amplified RF signal current and the second signal is representative of the amplified RF signal voltage; and
provide a fast loop gain control signal based on the TRP estimate, such that control of the fast loop gain is via the fast loop gain control signal.

9. The circuitry of claim 8 wherein the TRP control circuitry is further configured to substantially ignore amplitude variations in the first signal and the second signal having a bandwidth greater than a bandwidth of the TRP-drift.

10. The circuitry of claim 8 wherein the closed-loop gain linearization circuit further comprises a variable gain RF amplifier configured to:
receive and amplify the second signal to provide an amplified feedback signal, such that the gain adjustment to the RF amplification circuit is further based on the amplified feedback signal; and
adjust a gain of the variable gain RF amplifier based on the fast loop gain control signal.

11. The circuitry of claim 8 wherein the closed-loop gain linearization circuit further comprises a variable gain baseband amplifier configured to:
receive and amplify a baseband signal, which is based on the first signal, to provide an amplitude feedback signal, such that the gain adjustment to the RF amplification circuit is further based on the amplitude feedback signal; and
adjust a gain of the variable gain baseband amplifier based on the fast loop gain control signal.

12. The circuitry of claim 8 wherein the closed-loop gain linearization circuit further comprises a variable gain baseband amplifier configured to:
receive and amplify a baseband signal, which is based on the second signal, to provide an amplitude feedback signal, such that the gain adjustment to the RF amplification circuit is further based on the amplitude feedback signal; and
adjust a gain of the variable gain baseband amplifier based on the fast loop gain control signal.

13. The circuitry of claim 1 wherein the closed-loop gain linearization circuit further comprises:
TRP control circuitry configured to estimate the TRP using an impedance computation signal and a reference impedance signal;
a reference impedance circuit having a reference impedance, such that the reference impedance signal is based on the reference impedance; and
an impedance computation circuit configured to provide the impedance computation signal based on a first signal and a second signal, wherein the amplified RF signal has an amplified RF signal voltage and an amplified RF signal current, such that the first signal is representative of the amplified RF signal voltage and the second signal is representative of the amplified RF signal current.

14. Circuitry comprising:
an RF amplification circuit configured to amplify an RF signal to generate an amplified RF signal; and
a closed-loop gain linearization circuit, such that the RF amplification circuit and the closed-loop gain linearization circuit form a fast control loop and a slow control loop, wherein:
the slow control loop includes a first programmable attenuator and a total radiated power (TRP) control circuit and is configured to control a slow loop gain of the slow control loop by adjusting the first programmable attenuator using the TRP control circuit based on aggregated loop error signal;
the fast control loop includes a second programmable attenuator and the TRP control circuit and is configured to control a fast loop gain of the fast control loop by adjusting the second programmable attenuator using the TRP control circuit based on the aggregated loop error signal; and
each of the first programmable attenuator and the second programmable attenuator is configured to apply a gain adjustment to the RF amplification circuit based on the slow loop gain and the fast loop gain, respectively, wherein the first programmable attenuator controls TRP-drift in the RF amplification circuit and the second programmable attenuator controls amplitude distortion in the RF amplification circuit.

15. The circuitry of claim 14 wherein:
the slow control loop and the fast control loop further include a

Assignees

• Rf Micro Devices (Cayman Islands) Ltd
• Qorvo Us Inc

Inventors

• Scott Baker
• Leipold Dirk Robert Walter
• Maxim George

Classifications

• H03F3/213

  in integrated circuits · CPC title

• H01F27/28

  Coils; Windings; Conductive connections · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03H7/1775

  Parallel LC in shunt or branch path (H03H7/1791 takes precedence) · CPC title

• H01F27/385

  for reducing harmonics · CPC title