Semiconductor module including plate-shaped insulating members having different thickness

Patent metadata

Field	Value
Publication number	US-9443784-B2
Application number	US-201214371854-A
Country	US
Kind code	B2
Filing date	Mar 9, 2012
Priority date	Mar 9, 2012
Publication date	Sep 13, 2016
Grant date	Sep 13, 2016

Abstract

A power semiconductor chip and a low-power portion that has power consumption lower than that of the power semiconductor chip are located on a predetermined surface side of a heat sink having conductivity. A first plate-shaped insulating member extends between the power semiconductor chip and the heat sink. A second plate-shaped insulating member extends between the low-power portion and the heat sink. A portion, which faces the low-power portion, of the second plate-shaped insulating member is thicker than a portion, which faces the power semiconductor chip, of the first plate-shaped insulating member.

First claim

The invention claimed is:

1. A semiconductor module, comprising:
a heat sink having conductivity;
a power semiconductor chip located on a predetermined surface side of said heat sink;
a low-power portion that is located on said predetermined surface side of said heat sink and has power consumption lower than that of said power semiconductor chip;
a first plate-shaped insulating member extending between said power semiconductor chip and said heat sink; and
a second plate-shaped insulating member extending between said low-power portion and said heat sink,
wherein a portion, which faces said low-power portion, of said second plate-shaped insulating member is thicker than a portion, which faces said power semiconductor chip, of said first plate-shaped insulating member,
said semiconductor module further comprising:
a high-heat-resistant chip that is located on said predetermined surface side of said heat sink and has heat resistance higher than that of said power semiconductor chip; and
a third plate-shaped insulating member extending between said high-heat-resistant chip and said heat sink,
wherein a portion, which faces said high-heat-resistant chip, of said third plate-shaped insulating member is thicker than said portion, which faces said power semiconductor chip, of said first plate-shaped insulating member.

2. The semiconductor module according to claim 1 , further comprising:
base layers bonded on surfaces of said first, second and third plate-shaped insulating members respectively, said surfaces facing said heat sink; and
bonding member bonding said base layers and said predetermined surface of said heat sink.

3. The semiconductor module according to claim 1 , wherein said first plate-shaped insulating member has a protruding portion surrounding said power semiconductor chip.

4. A semiconductor module, comprising:
a heat sink having conductivity;
a power semiconductor chip located on a predetermined surface side of said heat sink;
a high-heat-resistant chip that is located on said predetermined surface side of said heat sink and has heat resistance higher than that of said power semiconductor chip;
a plate-shaped insulating member extending between said power semiconductor chip and said heat sink; and
another plate-shaped insulating member extending between said high-heat-resistant chip and said heat sink,
wherein a portion, which faces said high-heat-resistant chip, of said another plate-shaped insulating member is thicker than a portion, which faces said power semiconductor chip, of said plate-shaped insulating member.

5. The semiconductor module according to claim 4 , further comprising:
base layers bonded on surfaces of said plate-shaped insulating members and said another plate-shaped insulating members respectively, said surfaces facing said heat sink; and
bonding member bonding said base layers and said predetermined surface of said heat sink.

6. The semiconductor module according to claim 4 , wherein said plate-shaped insulating member has a protruding portion surrounding said power semiconductor chip.

Assignees

• Hatori Kenji
• Mitsubishi Electric Corp

Inventors

• Hatori Kenji

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title