Display device having a plurality of pixels

US9443455B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9443455-B2
Application numberUS-201213369695-A
CountryUS
Kind codeB2
Filing dateFeb 9, 2012
Priority dateFeb 25, 2011
Publication dateSep 13, 2016
Grant dateSep 13, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To extend the range of distance (between a display screen and the eye of a viewer) with which the viewer can see 3D images with the naked eye and to reduce power consumption. A parallax barrier in a shutter panel is controlled to be arranged optimally in accordance with the distance between the viewer and a display panel. Specifically, an optimal parallax barrier is formed as appropriate by selectively switching a light-transmitting state and a light-shielding state of a plurality of optical shutter regions and a display element unit of pixels depending on a retention state. The retention state is realized in such a manner that at least one of electrodes between which a liquid crystal layer is sandwiched is connected to a transistor including a semiconductor layer containing an oxide semiconductor and the transistor is turned off.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display device comprising: a sensor configured to detect a distance between the display device and a viewer; a display panel including a plurality of pixels arranged in a matrix; and a shutter panel adjacent to the display panel, and including: a first substrate with first electrodes arranged in a stripe pattern, each first electrode being connected to a transistor including an oxide semiconductor layer; a second substrate provided with second electrodes arranged in a stripe pattern; and a liquid crystal layer sandwiched between the first electrode and the second electrode, wherein off state currents per micrometer of channel width of the transistors are 1×10 −22 A or less, wherein the display device is configured to control light emission of the pixels and electric potentials applied to the first electrodes in accordance with the distance, wherein an area transmitting light through the shutter panel is variable in accordance with the distance, wherein, in a first retention state, the display panel is configured to perform a first 3D display with each of the pixels functioning individually as one display element unit, and wherein, in a second retention state, the display panel is configured to perform a second 3D display with at least two pixels functioning together as one display element unit. 2. The display device according to claim 1 , further comprising a shutter panel control circuit electrically connected to the transistors; wherein the shutter panel control circuit is configured not to output a signal when the distance does not change, or when a 2D image is displayed; and wherein, when no signal is output from the shutter panel control circuit, the electric potentials are retained. 3. The display device according to claim 1 , wherein each second electrode is electrically connected to a transistor including an oxide semiconductor layer. 4. The display device according to claim 1 , wherein the transistors share one gate electrode. 5. The display device according to claim 1 , further comprising capacitors each electrically connected to a corresponding one of the first electrodes; wherein the capacitors share an electrode layer. 6. The display device according to claim 1 , wherein the transistors are configured to maintain the electric potentials applied to the first electrodes when turned off. 7. The display device according to claim 1 , wherein the transistors are configured to maintain respective electric potentials applied to each of respective first electrodes when turned off; and wherein the oxide semiconductor layer comprises a crystalline oxide semiconductor with c-axis orientation. 8. An electronic device including the display device according to claim 1 . 9. The display device according to claim 1 , wherein the plurality of pixels comprises a first pixel and a second pixel functioning together as one display element unit, and wherein the first pixel is configured to express black while sub-pixels of the second pixel express at least one of red, green, and blue. 10. The display device according to claim 1 , wherein the plurality of pixels comprises: a first pixel and a second pixel functioning together as one display element unit; and a third pixel and a fourth pixel functioning together as one display element unit, wherein the first pixel, the second pixel, the third pixel, and the fourth pixel each includes a first sub-pixel, a second sub-pixel, and a third sub-pixel, wherein the first sub-pixel and the second sub-pixel of the first pixel are configured to express black while the first sub-pixel, the second sub-pixel, and the third sub-pixel of the second pixel and the third sub-pixel of the first pixel express at least one of red, green, and blue, and wherein the second sub-pixel and the third sub-pixel of the fourth pixel are configured to express black while the first sub-pixel, the second sub-pixel, and the third sub-pixel of the third pixel and the first sub-pixel of the fourth pixel express at least one of red, green, and blue. 11. The display device according to claim 1 , wherein at least one of the first electrodes has a width different from that of the other first electrodes, and wherein at least one of the second electrodes has a width different from that of the other second electrodes. 12. A display device comprising: a sensor configured to detect a distance between the display device and a viewer; a display panel including a plurality of pixels arranged in a matrix; and a shutter panel adjacent to the display panel, and including: a first substrate with first electrodes arranged in a stripe pattern, each first electrode being connected to a transistor including an oxide semiconductor layer; a second substrate provided with second electrodes arranged in a stripe pattern; and a liquid crystal layer sandwiched between the first electrode and the second electrode, wherein off state currents per micrometer of channel width of the transistors are 1×10 −22 A or less, wherein an area transmitting light through the shutter panel is variable in accordance with the distance, wherein, in a first retention state, the display panel is configured to perform a first 3D display with each of the pixels functioning individually as one display element unit, wherein, in a second retention state, the display panel is configured to perform a second 3D display with at least two pixels functioning together as one display element unit, wherein the display device is configured to control light emission of the pixels and electric potentials applied to the first electrodes in accordance with the distance, and wherein a number of pixels functioning as one display element unit decreases when the distance increases. 13. The display device according to claim 12 , further comprising a shutter panel control circuit electrically connected to the transistors; wherein the shutter panel control circuit is configured not to output a signal when the distance does not change, or when a 2D image is displayed; and wherein, when no signal is output from the shutter panel control circuit, the electric potentials are retained. 14. The display device according to claim 12 , wherein each second electrode is electrically connected to a transistor including an oxide semiconductor layer. 15. The display device according to claim 12 , wherein the transistors share one gate electrode. 16. The display device according to claim 12 , further comprising capacitors each electrically connected to a corresponding one of the first electrodes; wherein the capacitors share an electrode layer. 17. The display device according to claim 12 , wherein the transistors are configured to maintain the electric potentials applied to the first electrodes when turned off. 18. The display device according to claim 12 , wherein the transistors are configured to maintain respective electric potentials applied to each of respective first electrodes when turned off; and wherein the oxide semiconductor layer comprises a crystalline oxide semiconductor with c-axis orientation. 19. An electronic device including the display device according to claim 12 . 20. The display device according to claim 12 , wherein the plurality of pixels comprises a first pixel and a second pixel functioning together as one display element unit, and wherein the first pixel is configured to express black while sub-pixels of the second pixel express at least one of red, green

Assignees

Inventors

Classifications

  • for tracking forward-backward translational head movements, i.e. longitudinal movements · CPC title

  • Synchronisation thereof; Control thereof · CPC title

  • the parallax barriers being time-variant · CPC title

  • Switching between monoscopic and stereoscopic modes · CPC title

  • using parallax barriers · CPC title

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What does patent US9443455B2 cover?
To extend the range of distance (between a display screen and the eye of a viewer) with which the viewer can see 3D images with the naked eye and to reduce power consumption. A parallax barrier in a shutter panel is controlled to be arranged optimally in accordance with the distance between the viewer and a display panel. Specifically, an optimal parallax barrier is formed as appropriate by sel…
Who is the assignee on this patent?
Hiroki Masaaki, Miyake Hiroyuki, Hirakata Yoshiharu, and 2 more
What technology area does this patent fall under?
Primary CPC classification G09G3/003. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 13 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).