Devices including metal-silicon contacts using indium arsenide films and apparatus and methods

Patent metadata

Field	Value
Publication number	US-9441298-B2
Application number	US-201514939202-A
Country	US
Kind code	B2
Filing date	Nov 12, 2015
Priority date	Jan 26, 2012
Publication date	Sep 13, 2016
Grant date	Sep 13, 2016

Abstract

Described are apparatus and methods for forming films comprise indium and arsenic. In particular, these films may be formed in a configuration of two or more chambers under “load lock” conditions. These films may include additional components as dopants, such as aluminum and/or gallium. Such films can be used in metal/silicon contacts having low contact resistances. Also disclosed are devices including the films comprising indium arsenide.

First claim

What is claimed is:

1. A substrate processing apparatus comprising:
a first processing chamber to clean a substrate to provide a cleaned substrate, the first processing chamber performing an atomic hydrogen cleaning or cleaning with a fluorine-containing precursor;
a second processing chamber in communication with the first processing chamber to deposit a layer comprising indium arsenide on the cleaned substrate;
a third processing chamber in communication with the second processing chamber to deposit a metal layer on the layer comprising indium arsenide; and
a control system in communication with the first, second and third processing chambers, the control system configured to move the substrate from the first processing chamber directly to the second processing chamber and to deposit an indium arsenide layer directly onto the cleaned substrate in the second processing chamber,
wherein the first, second and third processing chambers are in communication under load lock conditions.

2. The apparatus of claim 1 , wherein the second processing chamber is an atomic layer deposition (ALD) chamber, physical vapor deposition (PVD) chamber, chemical vapor deposition (CVD) chamber or molecular beam epitaxy (MBE) chamber.

3. The apparatus of claim 1 , wherein the indium arsenide layer further comprises one or more of gallium, aluminum, antimony and phosphorus.

4. The apparatus of claim 1 , wherein the third processing chamber is an ALD chamber.

5. The apparatus of claim 1 , wherein the control system controls the second processing chamber to deposit a layer comprising indium arsenide having a predetermined thickness.

6. The apparatus of claim 5 , wherein the predetermined thickness is in the range from about 0.5 nm to about 2 nm.

7. The apparatus of claim 5 , wherein the predetermined thickness is selected to optimize contact resistivity with an underlying substrate surface.

8. The apparatus of claim 5 , wherein the predetermined thickness is selected to provide a contact resistivity below 4×10 −9 ohm-cm 2 .

9. The apparatus of claim 1 , wherein the control system comprises a CPU and a computer-readable medium having stored thereon a set of machine-executable instructions that, when executed by the CPU, cause the apparatus to perform a method comprising:
cleaning a surface of the substrate to provide a cleaned substrate;
moving the cleaned substrate from the first processing chamber to a transfer chamber;
moving the cleaned substrate from the transfer chamber to the second processing chamber;
depositing a layer comprising indium arsenide on the cleaned substrate;
moving the substrate having the layer comprising indium arsenide thereon from the second processing chamber to a transfer chamber;
moving the substrate having the layer comprising indium arsenide thereon from the transfer chamber to the third processing chamber; and
depositing a metal layer on the layer comprising indium arsenide.

Assignees

• Applied Materials Inc

Inventors

• Ahmed Khaled Z
• Gopalraja Prabu
• Noori Atif
• Chang Mei

Classifications

• H10P72/0468

  comprising a chamber adapted to a particular process · CPC title

• H10P72/0462 Primary

  characterised by the construction of the processing chambers, e.g. modular processing chambers · CPC title

• H10P72/0448

  Apparatus for applying a liquid, a resin, an ink or the like · CPC title

• H10D64/0113

  the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers · CPC title

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title