Scheduling module and method thereof

Patent metadata

Field	Value
Publication number	US-9438525-B2
Application number	US-201214402935-A
Country	US
Kind code	B2
Filing date	Jun 1, 2012
Priority date	Jun 1, 2012
Publication date	Sep 6, 2016
Grant date	Sep 6, 2016

Abstract

A scheduling module arranged to schedule the transmission of data from a plurality of data sources over a serial communication interface. The scheduling module comprises a register array and is arranged to selectively couple one of the data sources to the serial communication interface based at least partly on a source identifier value stored within a currently selected register within the register array. The scheduling module is further arranged to select a next sequential register within the register array upon receipt of a trigger signal.

First claim

The invention claimed is:

1. A scheduling module for scheduling transmission of data from a plurality of data sources over a serial communication interface, the scheduling module comprising:
a register array, wherein the scheduling module is arranged to
selectively couple one of the data sources to the serial communication interface based at least partly on a source identifier value stored within a currently selected register within the register array, and
select a next sequential register within the register array upon receipt of a trigger signal.

2. The scheduling module of claim 1 , wherein the scheduling module comprises:
a register pointer component arranged to store and output a register pointer value corresponding to a register within the register array, wherein the scheduling module is arranged to selectively couple one of the data sources to the serial communication interface based at least partly on a source identifier value stored within a register within the register array to which the register pointer value corresponds.

3. The scheduling module of claim 2 , wherein the register pointer component is arranged to increment the register pointer value upon receipt of the trigger signal.

4. The scheduling module of claim 1 , wherein the scheduling module is arranged to schedule the transmission of data from a plurality of data sources comprising at least one from a group of:
timing data source;
command data source; and
delay and/or passive data source.

5. The scheduling module of claim 1 , wherein the scheduling module is further arranged to selectively couple one of the data sources to the serial communication interface further based on at least one conditional signal, upon the source identifier value stored within the currently selected register comprising a dynamic source identifier value.

6. The scheduling module of claim 5 , wherein the at least one conditional signal comprises a command data update signal.

7. The scheduling module of claim 6 , where the scheduling module is arranged to selectively couple a command data source to the serial communication interface upon the source identifier value within the currently selected register comprising a dynamic source identifier value, and upon the command data update signal indicating the availability of updated command data.

8. The scheduling module of claim 7 , wherein the scheduling module is arranged to selectively couple one of:
a timing data source; and
delay/passive data source,

to the serial communication interface upon the source identifier value within the currently selected register comprising a dynamic source identifier value, and upon the command data update signal indicating no updated command data available.

9. The scheduling module of claim 1 , wherein the trigger signal comprises at least one from a group comprising at least one of:
a timer signal;
an internal event trigger signal generated within a system-on-chip of which the scheduling module forms an integral part; and
an external event trigger signal.

10. The scheduling module of claim 1 implemented within an integrated circuit device comprising at least one die within a single integrated circuit package.

11. A serial communication system comprising the scheduling module of claim 1 .

12. A method of scheduling the transmission of data from a plurality of data sources over a serial communication interface, the method comprising:
selectively coupling one of the data sources to the serial communication interface based at least partly on a source identifier value stored within a currently selected register within a register array; and
selecting a next sequential register within the register array upon receipt of a trigger signal.

13. The method of claim 12 , wherein the plurality of data sources comprises at least one from a group of:
timing data source;
command data source; and
delay/passive data source.

14. The method of claim 12 , wherein the method further comprises selectively coupling one of the data sources to the serial communication interface further based on at least one conditional signal, upon the source identifier value stored within the currently selected register comprising a dynamic source identifier value.

15. The method of claim 14 , wherein the at least one conditional signal comprises a command data update signal.

16. The method of claim 15 , where the method further comprises selectively coupling a command data source to the serial communication interface upon the source identifier value within the currently selected register comprising a dynamic source identifier value, and upon the command data update signal indicating the availability of updated command data.

17. The method of claim 16 , wherein the method further comprises:
selectively coupling one of a timing data source, and delay and/or passive data source to the serial communication interface upon the source identifier value within the currently selected register comprising a dynamic source identifier value; and
indicating no updated command data available, upon the command data update signal.

18. The method of claim 12 , wherein the trigger signal comprises at least one from a group of:
a timer signal;
an internal event trigger signal generated within a system-on-chip of which the scheduling module forms an integral part; and
an external event trigger signal.

Assignees

• Moran Robert
• C Ganesh Rao Karthik
• Paling Robin
• Freescale Semiconductor Inc

Inventors

• Moran Robert
• C Ganesh Rao Karthik
• Paling Robin

Classifications

• G06F13/382 Primary

  using universal interface adapter · CPC title

• H04L47/50 Primary

  Queue scheduling · CPC title