Integrated tunable filter architecture

Patent metadata

Field	Value
Publication number	US-9438196-B2
Application number	US-201414462219-A
Country	US
Kind code	B2
Filing date	Aug 18, 2014
Priority date	Feb 14, 2014
Publication date	Sep 6, 2016
Grant date	Sep 6, 2016

Abstract

An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.

First claim

What is claimed is:

1. An integrated circuit package for selectively filtering unwanted frequencies from a signal path of a frequency based circuit, including:
(a) a frequency based circuit having a signal path;
(b) one or more digitally tunable filters coupled to the signal path of the frequency based circuit, wherein at least one digitally tunable filter includes corresponding direct control lines and is configured to be selectively activated to filter unwanted frequencies from the signal path of the frequency based integrated circuit, wherein the frequency based circuit and such at least one digitally tunable filter are co-designed so as to absorb and compensate for residual and other parasitic impedances present in the integrated circuit, and wherein the direct control lines corresponding to each such digitally tunable filter are configured to receive a digital control word that sets the digitally tunable filter to a selected one of a plurality of states; and
(c) a lookup table, coupled to at least one digitally tunable filter, for arbitrarily mapping an initial digital control word to the digital control word.

2. The integrated circuit package of claim 1 , further including control logic, coupled to the direct control lines of at least one digitally tunable filter, for converting the received digital control word to drive signals for such direct control lines.

3. The integrated circuit package of claim 1 , wherein the initial digital control words are received from a source external to the integrated circuit package.

4. The integrated circuit package of claim 1 , further including a control word memory, coupled to the direct control lines of at least one digitally tunable filter, for storing at least one digital control word.

5. The integrated circuit package of claim 4 , wherein the control word memory includes programmable non-volatile memory.

6. The integrated circuit package of claim 4 , wherein the programmable non-volatile memory comprises fusible links for permanently saving a selected digital control word.

7. The integrated circuit package of claim 1 , further including a decoder, coupled to at least one digitally tunable filter, for converting a received digital control word from a first value to at least one second value.

8. The integrated circuit package of claim 1 , wherein at least one digitally tunable filter includes P corresponding direct control lines and each initial digital control word has a width W, such that W<P, wherein the lookup table converts each received initial digital control word having width W to a digital control word having width P corresponding to the P corresponding direct control lines.

9. The integrated circuit package of claim 1 , wherein at least one digitally tunable filter is addressable by values of selected bits of a received control word.

10. The integrated circuit package of claim 1 , wherein at least two digitally tunable filters are separately addressable by values of selected bits of a received control word.

11. A method of calibrating a frequency based circuit that includes digitally tunable circuit elements, including:
(a) providing an integrated circuit package for selectively filtering unwanted frequencies from a signal path of a frequency based circuit, including:
(1) a frequency based circuit having a signal path; and
(2) one or more digitally tunable filters coupled to the signal path of the frequency based circuit, wherein at least one digitally tunable filter includes corresponding direct control lines and is configured to be selectively activated to filter unwanted frequencies from the signal path of the frequency based integrated circuit, wherein the frequency based circuit and such at least one digitally tunable filter are co-designed so as to absorb and compensate for residual and other parasitic impedances present in the integrated circuit, and wherein the direct control lines corresponding to each such digitally tunable filter are configured to receive a digital control word that sets the digitally tunable filter to a selected one of a plurality of states;

(b) measuring the frequency response of the frequency based circuit at selected test points while sequencing the digital control word over the entire range of available values for the digital control word, thereby generating a mapping of digital control word values to corresponding frequency response; and
(c) enabling selection of a particular frequency response by applying the corresponding mapped digital control word value.

12. A method of calibrating a frequency based circuit that includes digitally tunable circuit elements, including:
(a) providing an integrated circuit package for selectively filtering unwanted frequencies from a signal path of a frequency based circuit, including:
(1) a frequency based circuit having a signal path; and
(2) one or more digitally tunable filters coupled to the signal path of the frequency based circuit, wherein at least one digitally tunable filter includes corresponding direct control lines and is configured to be selectively activated to filter unwanted frequencies from the signal path of the frequency based integrated circuit, wherein the frequency based circuit and such at least one digitally tunable filter are co-designed so as to absorb and compensate for residual and other parasitic impedances present in the integrated circuit, and wherein the direct control lines corresponding to each such digitally tunable filter are configured to receive a corresponding digital control word that sets the digitally tunable filter to a selected one of a plurality of states;

(b) measuring the frequency response of at least one digitally tunable filter of one or more samples of the frequency based circuits at selected test points while sequencing the received corresponding digital control word over a selected range of available values for the digital control word;
(c) determining a corresponding nominal value for the received corresponding digital control word for the at least one digitally tunable filter based on the measured frequency response;
(d) measuring, for units of the frequency based circuit to be tested, a corresponding frequency response of at least one digitally tunable filter at selected test points while varying the digital control word over a subrange of available values for the digital control word that includes the corresponding nominal value; and
(e) storing a selected best value for the digital control word from the subrange of available values if such best selected value achieves at least a selected frequency response criteria.

13. The method of claim 12 , further including, for measured units that do not achieve the selected frequency response criteria within the applied subrange of available values for the digital control word, performing frequency response testing of such at least one digitally tunable filter at selected test points while sequencing the digital control word over the selected range of available values for the digital control word, thereby generating a mapping of digital control word values to corresponding frequency response.

14. The method of claim 12 , further including storing the selected value for the digital control word values as an absolute value.

15. The method of claim 12 , further including storing the selected value for the digital control word values as a relative value.

16. The method of claim 12 , further including measuring the corresponding frequency response of the digitally tunable filters sequentially.

17. The method of claim 12 , further including measuring the corre

Assignees

• Peregrine Semiconductor Corp

Inventors

• Smith William R
• Adamski Jaroslaw
• Nobbe Dan William
• Comfoltey Edward Nicholas
• Wang Jingbo

Classifications

• H03H7/1758

  Series LC in shunt or branch path (H03H7/1791 takes precedence) · CPC title

• H03H7/01 Primary

  Frequency selective two-port networks · CPC title

• H03H7/06

  including resistors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence) · CPC title

• H03H2007/013

  Notch or bandstop filters · CPC title

• H03H2210/036

  Stepwise · CPC title