Annealing for damage free laser processing for high efficiency solar cells
US-9214585-B2 · Dec 15, 2015 · US
US9437757B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9437757-B2 |
| Application number | US-201514744962-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 19, 2015 |
| Priority date | Mar 13, 2013 |
| Publication date | Sep 6, 2016 |
| Grant date | Sep 6, 2016 |
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A method of fabricating a solar cell is disclosed. The method includes forming a polished surface on a silicon substrate and forming a first flowable matrix in an interdigitated pattern on the polished surface, where the polished surface allows the first flowable matrix to form an interdigitated pattern comprising features of uniform thickness and width. In an embodiment, the method includes forming the silicon substrate using a method such as, but not limited to, of diamond wire or slurry wafering processes. In another embodiment, the method includes forming the polished surface on the silicon substrate using a chemical etchant such as, but not limited to, sulfuric acid (H 2 SO 4 ), acetic acid (CH 3 COOH), nitric acid (HNO 3 ), hydrofluoric acid (HF) or phosphoric acid (H 3 PO 4 ). In still another embodiment, the etchant is an isotropic etchant. In yet another embodiment, the method includes providing a surface of the silicon substrate with at most 500 nanometer peak-to-valley roughness.
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What is claimed is: 1. A method of fabricating a solar cell, the solar cell having a front side which faces the sun during normal operation and a back side opposite the front side, the method comprising: forming a polished surface on a silicon substrate using an etchant, wherein the polished surface has at most 500 nanometer peak-to-valley roughness and is formed on the back side of the solar cell; depositing first and second dopant material, each dopant material having a viscosity in the range of 1-25 centipoise (cP), in an interdigitated pattern on the polished surface, the first and second dopant materials comprising a first and second dopant source, respectively, wherein the polished surface allows the first and second dopant materials to form an interdigitated pattern comprising features of uniform thickness and width; heating the silicon substrate and the first and second dopant materials to a temperature sufficient to cause the first and second dopant sources to diffuse into the silicon substrate forming a first and second doped regions within the silicon substrate; depositing a first dielectric layer over the first and second doped regions; forming a plurality of contact openings within the first dielectric layer; forming a first metal layer established through the contact openings over the first and second doped regions, wherein the first metal layer comprises electrically connected grids to the first and second doped regions on the back side; and forming a second metal layer on the first metal layer, wherein the first metal layer electrically couples the second metal layer to the first and second doped regions. 2. The method of claim 1 , wherein the silicon substrate is formed using a method selected from the group consisting of slurry wafering and diamond wire wafering processes. 3. The method of claim 1 , wherein forming the polished surface comprises: etching the silicon substrate with an anisotropic etchant to form a smoothened surface; and subsequently etching the smoothened surface with an isotropic etchant to form a polished surface. 4. The method of claim 1 , wherein forming the polished surface comprises etching the silicon substrate with an isotropic etchant. 5. The method of claim 1 , wherein forming the polished surface on the silicon substrate comprises etching a silicon substrate using a chemical etchant selected from the group consisting of sulfuric acid (H 2 SO 4 ), acetic acid (CHO 3 COOH), nitric acid (HNO 3 ), hydrofluoric acid (HF) and phosphoric acid (H 3 PO 4 ). 6. The method of claim 1 , wherein the silicon substrate is formed using a method selected from the group consisting of slurry wafering and diamond wire wafering processes, and wherein forming the polished surface comprises etching the silicon substrate with an isotropic etchant. 7. The method of claim 1 , wherein the silicon substrate is formed using a method selected from the group consisting of slurry wafering and diamond wire wafering processes, and wherein forming the polished surface on the silicon substrate comprises etching a silicon substrate using a chemical etchant selected from the group consisting of sulfuric acid (H 2 SO 4 ), acetic acid (CH 3 COOH), nitric acid (HNO 3 ), hydrofluoric acid (HF) and phosphoric acid (H 3 PO 4 ). 8. The method of claim 1 , wherein the silicon substrate is formed using a method selected from the group consisting of slurry wafering and diamond wire wafering processes, and wherein forming the polished surface comprises: etching the silicon substrate with an anisotropic etchant to form a smoothened surface; and subsequently etching the smoothened surface with an isotropic etchant to form a polished surface. 9. A method of fabricating a solar cell, the solar cell having a front side which faces the sun during normal operation and a back side opposite the front side, the method comprising: forming a polished surface on a silicon substrate using an isotropic etchant, wherein the polished surface has at most 500 nanometer peak-to-valley roughness and is formed on the back side of the solar cell; forming first and second doped regions on the back side of the solar cell; depositing a first dielectric layer over the first and second doped regions; forming a plurality of contact openings within the first dielectric layer; depositing a first metal paste to at least fill at least one contact opening established through the dielectric layer formed over the first and second doped regions, wherein the topography of the first and second doped regions is conformal with the polished surface of the silicon substrate; depositing a second metal paste to connect more than one contact opening filled with the first metal paste to form interdigitated patterns over the dielectric layer on the back side, wherein the second metal paste is deposited by industrial printing methods over the polished surface such that the topography of the second metal paste is conformal with the polished surface of the silicon substrate; curing the first and second metal paste to form a first metal layer comprising electrically connected grids to the first and second doped regions on the back side; and forming a second metal layer on the first metal layer, wherein the first metal layer electrically couples the second metal layer to the first and second doped regions. 10. The method of claim 9 , wherein the silicon substrate is formed using a method selected from the group consisting of slurry wafering and diamond wire wafering processes. 11. The method of claim 9 , wherein forming the polished surface on the silicon substrate comprises etching a silicon substrate using a chemical etchant selected from the group consisting of sulfuric acid (H 2 SO 4 ), acetic acid (CH 3 COOH), nitric acid (HNO 3 ), hydrofluoric acid (HF) and phosphoric acid (H 3 PO 4 ). 12. The method of claim 9 , wherein the silicon substrate is formed using a method selected from the group consisting of slurry wafering and diamond wire wafering processes, and wherein forming the polished surface on the silicon substrate comprises etching a silicon substrate using a chemical etchant selected from the group consisting of sulfuric acid (H 2 SO 4 ), acetic acid (CH 3 COOH), nitric acid (HNO 3 ), hydrofluoric acid (HF) and phosphoric acid (H 3 PO 4 ). 13. A method of fabricating a solar cell, the solar cell having a front side which faces the sun during normal operation and a back side opposite the front side, the method comprising: forming a polished surface on a silicon layer using an etchant, wherein the polished surface has at most 500 nanometer peak-to-valley roughness and is formed on the back side of the solar cell; depositing first and second dopant material, each dopant material having a viscosity in the range of 1-25 centipoise (cP), in an interdigitated pattern on the polished surface, the first and second dopant materials comprising a first and second dopant source, respectively, wherein the polished surface allows the first and second dopant materials to form an interdigitated pattern comprising features of uniform thickness and width; heating the silicon layer and the first and second dopant materials to a temperature sufficient to cause the first and second dopant sources to diffuse into the silicon layer forming a first and second doped regions within the silicon layer; depositing a first dielectric layer over the first and second doped regions; forming a plurality of contact openings within the first dielectric layer; forming a first metal layer established through the contact openings over the first and second doped regions, wherein the first metal layer comprises electric
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