Semiconductor device and semiconductor substrate

US9437725B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9437725-B2
Application numberUS-201414540545-A
CountryUS
Kind codeB2
Filing dateNov 13, 2014
Priority dateNov 13, 2013
Publication dateSep 6, 2016
Grant dateSep 6, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A semiconductor device is provided, which includes a barrier layer 14 formed on a substrate 10 and made of In x Al y Ga 1-x-y N, a channel layer 16 formed on the barrier layer and made of GaN or InGaN, an electron supplying layer 18 formed on the channel layer and made of AlGaN, InAlN, or InAlGaN, and a gate electrode and ohmic electrodes 24 and 26 formed on the electron supplying layer. Relations between x and y for the barrier layer of x>0, y>0, x+y≦1, and 0.533x<y<4.20x are satisfied.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a barrier layer formed on a substrate and made of one of InAlGaN and InAlN; a channel layer formed on the barrier layer and made of one of GaN and InGaN; an electron supplying layer formed on the channel layer and made of one of AlGaN, InAlN, and InAlGaN; and a gate electrode and ohmic electrodes formed on the electron supplying layer, wherein an interface between the barrier layer and the channel layer and an interface between the channel layer and the electron supplying layer have a conduction band energy lower than the Fermi level energy, whereby the conduction band at the channel layer forms an inverted U shape; and wherein the channel layer has a thickness of not less than 20 nm and not more than 100 nm. 2. The semiconductor device according to claim 1 , wherein the barrier layer is a single layer having uniform composition. 3. The semiconductor device according to claim 1 , wherein the barrier layer includes a plurality of layers, each layer having uniform composition. 4. A semiconductor device, comprising: a barrier layer formed on a substrate, the barrier layer being a single layer having a uniform composition of In x Al y Ga 1-x-y N; a channel layer formed on the barrier layer and made of one of GaN and InGaN; an electron supplying layer formed on the channel layer and made of one of AlGaN, InAlN, and InAlGaN; and a gate electrode and ohmic electrodes formed on the electron supplying layer, wherein relations between x and y for the barrier layer of x>0, y>0, x+y≦1, and 0.533x<y<4.20x are satisfied. 5. The semiconductor device according to claim 4 , wherein the barrier layer has a band gap of not less than 3.6 eV. 6. The semiconductor device according to claim 4 , wherein a relation of 2.10x<y is satisfied. 7. The semiconductor device according to claim 4 , wherein the channel layer has a thickness of not less than 20 nm and not more than 100 nm. 8. The semiconductor device according to claim 4 , wherein in a case in which the electron supplying layer is made of InAlN, the electron supplying layer has less than 18% In. 9. The semiconductor device according to claim 4 , wherein the barrier layer is a single layer having uniform composition. 10. The semiconductor device according to claim 4 , wherein the barrier layer includes a plurality of layers, each layer having uniform composition. 11. The semiconductor device according to claim 4 , wherein, in a case in which the electron supplying layer is made of AlGaN, the electron supplying layer has 15-30% Al, in a case in which the electron supplying layer is made of InAlN, the electron supplying layer has 83-85% Al, and in a case in which the electron supplying layer is made of InAlGaN, the electron supplying layer has 65-85% Al and 0-20% Ga. 12. A semiconductor substrate, comprising: a barrier layer formed on a substrate, the barrier layer being a single layer having a uniform composition of In x Al y Ga 1-x-y N; a channel layer formed on the barrier layer and made of one of GaN and InGaN; and an electron supplying layer formed on the channel layer and made of one of AlGaN, InAlN, and InAlGaN, wherein relations between x and y for the barrier layer of x>0, y>0, x+y≦1, and 0.533x<y<4.20x are satisfied. 13. The semiconductor substrate according to claim 12 , wherein the barrier layer has a band gap of not less than 3.6 eV. 14. The semiconductor substrate according to claim 12 , wherein a relation of 2.10 x<y is satisfied. 15. The semiconductor substrate according to claim 12 , wherein the channel layer has a thickness of not less than 20 nm and not more than 100 nm. 16. The semiconductor substrate according to claim 12 , wherein in a case in which the electron supplying layer is made of InAlN, the electron supplying layer has less than 18% In. 17. The semiconductor substrate according to claim 12 , wherein, in a case in which the electron supplying layer is made of AlGaN, the electron supplying layer has 15-30% Al, in a case in which the electron supplying layer is made of InAlN, the electron supplying layer has 83-85% Al, and in a case in which the electron supplying layer is made of InAlGaN, the electron supplying layer has 65-85% Al and 0-20% Ga.

Assignees

Inventors

Classifications

  • using Group III-V technology · CPC title

  • Nitride Group III-V materials, e.g. AlN or GaN · CPC title

  • Manufacture or treatment · CPC title

  • being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP · CPC title

  • comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title

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What does patent US9437725B2 cover?
A semiconductor device is provided, which includes a barrier layer 14 formed on a substrate 10 and made of In x Al y Ga 1-x-y N, a channel layer 16 formed on the barrier layer and made of GaN or InGaN, an electron supplying layer 18 formed on the channel layer and made of AlGaN, InAlN, or InAlGaN, and a gate electrode and ohmic electrodes 24 and 26 formed on the electron supplying l…
Who is the assignee on this patent?
Sumitomo Electric Industries
What technology area does this patent fall under?
Primary CPC classification H10D30/4732. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).