Semiconductor device

Patent metadata

Field	Value
Publication number	US-9437601-B1
Application number	US-201514848946-A
Country	US
Kind code	B1
Filing date	Sep 9, 2015
Priority date	Jul 8, 2015
Publication date	Sep 6, 2016
Grant date	Sep 6, 2016

Abstract

A semiconductor device according to an embodiment includes a stacked body, and a semiconductor pillar. The stacked body includes first insulating layers and conductive layers. The conductive layer includes silicon. At least one of the conductive layers includes a first portion, a second portion, and a third portion. The first portion includes a first element selected from at least one of boron and phosphorus. The second portion includes the first element. The third portion is provided between the first portion and the second portion in a stacking direction of the conductive layers and the first insulating layers. The third portion includes a second element. The second element is selected from at least one of carbon, nitrogen, oxygen, and germanium. The semiconductor pillar pierces through the stacked body. The semiconductor pillar extends in the stacking direction.

First claim

What is claimed is:

1. A semiconductor device comprising:
a stacked body including a plurality of first insulating layers and a plurality of conductive layers including silicon, the conductive layers and the first insulating layers being alternately provided, and at least one of the conductive layers including:
a first portion including a first element selected from at least one of boron and phosphorus;
a second portion including the first element; and
a third portion provided between the first portion and the second portion in a stacking direction of the plurality of conductive layers and the plurality of first insulating layers and including a second element selected from at least one of carbon, nitrogen, oxygen, and germanium; and

a semiconductor pillar piercing through the stacked body and extending in the stacking direction.

2. The device according to claim 1 , further comprising a second insulating layer provided in contact with the conductive layer between the semiconductor pillar and the stacked body, wherein
the third portion is in contact with the second insulating layer.

3. The device according to claim 1 , further comprising a second insulating layer provided in contact with the conductive layer between the semiconductor pillar and the stacked body, wherein
the first portion and the second portion are in contact with the second insulating layer.

4. The device according to claim 1 , further comprising a second insulating layer provided in contact with the conductive layer between the semiconductor pillar and the stacked body, wherein
the first portion, the second portion, and the third portion are in contact with the second insulating layer.

5. The device according to claim 1 , wherein thickness in the stacking direction of the third portion is smaller than thickness in the stacking direction of the first portion and smaller than thickness in the stacking direction of the second portion.

6. The device according to claim 1 , wherein the first element is boron.

7. The device according to claim 1 , wherein
the first portion and the second portion include the second element, and
a maximum of concentration of the second element in the first portion and a maximum of concentration of the second element in the second portion are lower than a maximum of concentration of the second element in the third portion.

8. The device according to claim 1 , wherein a maximum of concentration of the first element in the first portion is higher than a maximum of concentration of the second element in the third portion.

9. The device according to claim 1 , wherein a ratio of the second element to the silicon in the third portion is not less than 0.1% and not more than 10%.

10. The device according to claim 1 , wherein
the third portion includes the first element, and
a minimum of concentration of the first element in the third portion is higher than a maximum of concentration of the second element.

11. The device according to claim 1 , wherein
the third portion includes the first element, and
a maximum of concentration of the second element in the third portion is higher than a minimum of concentration of the first element.

12. The device according to claim 1 , wherein
the third portion includes the first element, and
a maximum of concentration of the first element in the third portion is lower than a maximum of concentration of the first element in the first portion.

13. The device according to claim 1 , wherein
the at least one conductive layer further includes:
a fourth portion including the second element, the second portion being provided between the third portion and the fourth portion in the stacking direction; and
a fifth portion including the first element, the fourth portion being provided between the second portion and the fifth portion in the stacking direction.

14. The device according to claim 13 , wherein
thickness in the stacking direction of the third portion is smaller than thickness in the stacking direction of the first portion, smaller than thickness in the stacking direction of the second portion, and smaller than thickness in the stacking direction of the fifth portion, and
thickness in the stacking direction of the fourth portion is smaller than the thickness in the stacking direction of the first portion, smaller than the thickness in the stacking direction of the second portion, and smaller than the thickness in the stacking direction of the fifth portion.

Assignees

• Toshiba Kk

Inventors

• Sonehara Takeshi

Classifications

• H10D64/035

  comprising conductor-insulator-conductor-insulator-semiconductor structures · CPC title

• H10D64/662

  the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures · CPC title

• H10D64/037 Primary

  comprising charge-trapping insulators · CPC title

• H01L27/11568

  Electricity · mapped topic

• H01L27/11582

  Electricity · mapped topic