Enhanced flip chip structure using copper column interconnect

US9437534B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9437534-B2
Application numberUS-201514714331-A
CountryUS
Kind codeB2
Filing dateMay 17, 2015
Priority dateFeb 29, 2012
Publication dateSep 6, 2016
Grant dateSep 6, 2016

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A flip chip package includes: a carrier coupled to a die. The carrier includes: at least a via, for coupling the surface of the carrier to electrical traces in the carrier; and at least a capture pad electrically coupled to the via, wherein the capture pad is plated over the via. The die includes: at least a bond pad formed on the surface of the die; and at least a copper column, formed on the bond pad for coupling the die to the capture pad on the carrier, wherein part of the copper column overhangs the via opening.

First claim

Opening claim text (preview).

What is claimed is: 1. A flip chip package comprising: a carrier, comprising: at least a via, for coupling the surface of the carrier to electrical traces in the carrier, wherein the via is open and unfilled; and at least a capture pad electrically coupled to the via, wherein the capture pad is plated over the via; and a die, coupled to the carrier, comprising: at least a bond pad formed on the surface of the die; and at least a copper column, formed on the bond pad for coupling the die to the capture pad on the carrier, wherein part of the copper column overhangs the via opening and part of the copper column does not overhang the via opening, so that only part of the via opening is covered by the copper column. 2. The flip chip package of claim 1 , wherein the capture pad is asymmetrical about at least one axis running through the centre of the via opening, and the part of the copper column which does not overhang the via opening is disposed on the side of the capture pad having a greater surface area. 3. The flip chip package of claim 2 , wherein the copper column is curved about the vertical plane such that it has at least one axis of asymmetry. 4. The flip chip package of claim 3 , wherein the capture pad is egg shaped and a top view of the copper column is C-shaped. 5. The flip chip package of claim 2 , wherein the capture pad comprises a rectangular section which is formed on one side about the via opening, and the part of the copper column which does not overhang the via opening copper column is disposed on the rectangular section. 6. The flip chip package of claim 1 , wherein the copper column overhangs the bond pad. 7. The flip chip package of claim 2 , wherein at least one side of the copper column is parallel to an edge of the bond pad.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • relative to the surface, e.g. recessed, protruding · CPC title

  • changes in dispositions · CPC title

  • Soldering or alloying · CPC title

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Frequently asked questions

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What does patent US9437534B2 cover?
A flip chip package includes: a carrier coupled to a die. The carrier includes: at least a via, for coupling the surface of the carrier to electrical traces in the carrier; and at least a capture pad electrically coupled to the via, wherein the capture pad is plated over the via. The die includes: at least a bond pad formed on the surface of the die; and at least a copper column, formed on the …
Who is the assignee on this patent?
Mediatek Inc
What technology area does this patent fall under?
Primary CPC classification H10W70/635. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).