Method for manufacturing semiconductor device

US9437460B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9437460-B2
Application numberUS-201514665577-A
CountryUS
Kind codeB2
Filing dateMar 23, 2015
Priority dateJun 27, 2014
Publication dateSep 6, 2016
Grant dateSep 6, 2016

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Entry of resin into a cylindrical electrode can be suppressed without excessively increasing the number of parts and without unnecessarily damaging members. For this purpose, a semiconductor chip and a cylindrical electrode are mounted on one main surface of substrate. The substrate, the semiconductor chip, and the cylindrical electrode are sealed with resin material such that the cylindrical electrode has one end mounted to the substrate and the other opposite end at least exposed. After the step of sealing, an opening extending from the other end of the cylindrical electrode to a cavity in the cylindrical electrode is formed. Before performing the step of forming an opening, the other end of the cylindrical electrode is closed.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device, comprising the steps of: mounting a semiconductor chip and a cylindrical electrode on one main surface of a substrate, said cylindrical electrode including a side wall portion, a lower end, and an upper end, said upper end including an annular portion axially corresponding to said side wall portion and a transverse portion extending radially across said annular portion above a cavity formed in said cylindrical electrode, said transverse portion having a first axial thickness in a cavity cutout region directly above said cavity and a second axial thickness in another region directly above said cavity, wherein said first axial thickness is thinner than said second axial thickness; sealing said substrate, said semiconductor chip, and said cylindrical electrode with resin material such that said lower end of said cylindrical electrode is mounted to said substrate and said upper end of said cylindrical electrode is exposed; and forming an opening extending through said transverse portion of said upper end of said cylindrical electrode to said cavity in said cylindrical electrode after said step of sealing, before performing said step of forming an opening, said upper end of said cylindrical electrode is closed by said transverse portion of said upper end. 2. The method for manufacturing a semiconductor device according to claim 1 , wherein said cylindrical electrode is formed so as to include a flange on a side of said lower end, and said cylindrical electrode is mounted to said substrate at said flange. 3. The method for manufacturing a semiconductor device according to claim 1 , wherein an outer periphery of said cylindrical electrode is inclined so that a size of an outer periphery of said cylindrical electrode in a planar view is gradually reduced from a side of said lower end to a side of said upper end. 4. The method for manufacturing a semiconductor device according to claim 1 , wherein before performing said step of forming an opening, said cavity cutout region is directly above an outer periphery of said cavity. 5. The method for manufacturing a semiconductor device according to claim 1 , wherein said step of mounting a cylindrical electrode includes the steps of: retaining a plurality of said cylindrical electrodes by means of a single jig; and supplying said plurality of cylindrical electrodes collectively onto one main surface of said substrate by means of said jig.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Soldering or alloying · CPC title

  • being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

  • the connected ends being wedge-shaped · CPC title

  • Die-attach connectors and bond wires · CPC title

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Frequently asked questions

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What does patent US9437460B2 cover?
Entry of resin into a cylindrical electrode can be suppressed without excessively increasing the number of parts and without unnecessarily damaging members. For this purpose, a semiconductor chip and a cylindrical electrode are mounted on one main surface of substrate. The substrate, the semiconductor chip, and the cylindrical electrode are sealed with resin material such that the cylindrical e…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H10W74/01. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).