Ramp circuit
US-2024223204-A1 · Jul 4, 2024 · US
US9432035B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9432035-B2 |
| Application number | US-201514593078-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 9, 2015 |
| Priority date | Jan 9, 2015 |
| Publication date | Aug 30, 2016 |
| Grant date | Aug 30, 2016 |
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Multichannel successive approximation register (SAR) analog-to-digital converters (ADC), along with methods and systems for multichannel SAR analog-to-digital conversion, are disclosed herein. An exemplary multichannel SAR ADC can include a first SAR ADC for each of a plurality of input channels, and a second SAR ADC, a multiplexer, and a residue amplifier shared among the plurality of input channels. The multiplexer can select an analog residue signal from one of the first SAR ADCs for conversion by the second SAR ADC. The residue amplifier can amplify the selected analog residue signal. The second SAR ADC, multiplexer, and/or residue amplifier may be shared among all of the plurality of input channels. Where the multichannel SAR ADC includes N input channels, the second SAR ADC, multiplexer, and/or residue amplifier may be shared among b channels of the N input channels.
Opening claim text (preview).
What is claimed is: 1. A multichannel successive approximation register (SAR) analog-to-digital converter (ADC), the multichannel SAR ADC comprising: a first SAR ADC for each of a plurality of input channels, wherein the first SAR ADC is configured to receive a respective analog input signal from a respective input channel; and a second SAR ADC and a multiplexer shared among the plurality of input channels, the multiplexer configured to select an analog residue signal from one of the first SAR ADCs for conversion by the second SAR ADC. 2. The multichannel SAR ADC of claim 1 , further comprising a residue amplifier coupled to the second SAR ADC and the multiplexer, the residue amplifier configured to amplify the selected residue analog signal. 3. The multichannel SAR ADC of claim 1 , wherein the second SAR ADC and the multiplexer are shared among all of the plurality of input channels. 4. The multichannel SAR ADC of claim 1 , wherein: the plurality of input channels includes N input channels; and the second SAR ADC and the multiplexer are shared among b channels of the N input channels, wherein b is an integer from 2 to N, the multiplexer configured to select the analog residue signal from one of the first SAR ADCs associated with the b channels. 5. The multichannel SAR ADC of claim 4 , further comprising N/b second SAR ADCs and multiplexers, such that each second SAR ADC performs conversion for b channels. 6. The multichannel SAR ADC of claim 1 , wherein: the first SAR ADCs are configured to generate in parallel a respective first digital signal and a respective analog residue signal from the respective analog input signal; and the second SAR ADC is configured to serially generate second digital signals from the respective analog residue signals. 7. The multichannel SAR ADC of claim 6 , wherein the first SAR ADCs are configured to directly sample respective analog input signals. 8. The multichannel SAR ADC of claim 6 , wherein: the first SAR ADCs include a first comparator, a first digital-to-analog converter (DAC), and a first SAR controller, wherein each first SAR ADC generates the respective first digital signal by comparing the respective analog input signal with a respective first DAC reference voltage; and the second SAR ADC includes a second comparator, a second DAC, and a second SAR controller, wherein the second SAR ADC generates the second digital signal for each channel by comparing each respective analog residue signal with a second DAC reference voltage. 9. The multichannel SAR ADC of claim 1 , further comprising an ADC coupled to the first SAR ADC for each of the plurality of input channels, wherein the first SAR ADC is configured to perform a p-bit analog-to-digital conversion, and the ADC is configured to generate x bits of the p-bit analog-to-digital conversion, wherein p is a number of digital code bits and x is a number of digital code bits. 10. The multichannel SAR ADC of claim 9 , wherein the ADC is configured to generate most significant bits of the p-bit analog-to-digital conversion. 11. A method for performing multichannel successive approximation register (SAR) analog-to-digital conversion, the method comprising: performing a plurality of first SAR analog-to-digital conversions in parallel on a plurality of analog input signals; selecting an analog residue signal from among the plurality of first SAR analog-to-digital conversions; and performing a second SAR analog-to-digital conversion on the selected analog residue signal. 12. The method of claim 11 , further comprising amplifying the selected analog residue signal. 13. The method of claim 11 , wherein the analog residue signal is selected from among all of the first SAR analog-to-digital conversions. 14. The method of claim 11 , wherein the plurality of analog input signals includes N analog input signals, and the analog residue signal is selected from among b of the first SAR analog-to-digital conversions, wherein b is an integer from 2 to N. 15. The method of claim 11 wherein: performing the plurality of first SAR analog-to-digital conversions in parallel includes, for each first SAR analog-to-digital conversion, generating a respective first digital signal and a respective analog residue signal from a respective analog input signal; and performing the second SAR analog-to-digital conversion includes serially generating second digital signals from the respective analog residue signals. 16. The method of claim 11 , wherein at least one of the plurality of first SAR analog-to-digital conversions is a p-bit analog-to-digital conversion, the method further comprising performing an analog-to-digital conversion to generate x bits of the p-bit analog-to-digital conversion, wherein p is a number of digital code bits and x is a number of digital code bits. 17. The method of claim 11 , further comprising directly sampling the plurality of analog input signals. 18. A multichannel analog-to-digital conversion system comprising: means for performing a plurality of first SAR analog-to-digital conversions in parallel on a plurality of analog input signals; means for selecting an analog residue signal from among the plurality of first SAR analog-to-digital conversions; and means for performing a second SAR analog-to-digital conversion on the selected analog residue signal. 19. The multichannel analog-to-digital conversion system of claim 18 , further comprising means for amplifying the selected analog residue signal. 20. The multichannel analog-to-digital conversion system of claim 18 , wherein the first SAR analog-to-digital conversion is a p-bit analog-to-digital conversion, the analog-to-digital conversion further comprising means for performing an analog-to-digital conversion to generate x bits of the p-bit analog-to-digital conversion, wherein p is a number of digital code bits and x is a number of digital code bits.
Analogue/digital conversion; Digital/analogue conversion (conversion of analogue values to or from differential modulation H03M3/00) · CPC title
with digital/analogue converter for supplying reference values to converter · CPC title
Multiplexed conversion systems · CPC title
Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title
at one point, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18) · CPC title
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