Storage controllers, methods of operating the same and solid state disks including the same

Patent metadata

Field	Value
Publication number	US-9432018-B2
Application number	US-201514806686-A
Country	US
Kind code	B2
Filing date	Jul 23, 2015
Priority date	Sep 22, 2014
Publication date	Aug 30, 2016
Grant date	Aug 30, 2016

Abstract

A storage controller includes a first on-die termination (ODT) circuit, a second ODT circuit and an ODT control circuit. The first ODT circuit provides a first termination resistance with a strobe signal line transferring a data strobe signal. The second ODT circuit provides a second termination resistance with at least one data line transferring data. The ODT control circuit individually controls activation and deactivation of the first ODT circuit and the second ODT circuit.

First claim

What is claimed is:

1. A storage controller comprising:
a first on-die termination (ODT) circuit that is configured to provide a first termination resistance with a strobe signal line that is configured to transfer a data strobe signal;
a second ODT circuit that is configured to provide a second termination resistance with at least one data line that transfers data; and
an ODT control circuit that is configured to individually control activation and deactivation of the first ODT circuit and the second ODT circuit,
wherein the ODT control circuit activates the first ODT circuit and deactivates the second ODT circuit during a reception operation in which the storage controller receives the data from a nonvolatile memory device.

2. The storage controller of claim 1 , wherein the ODT control circuit provides a first ODT control signal to the first ODT circuit to activate the first ODT circuit and provides a second ODT control signal to the second ODT circuit to deactivate the second ODT circuit, in response to receiving a mode signal.

3. The storage controller of claim 1 , further comprising:
an I/O circuit that receives the data and the data strobe signal,
wherein the I/O circuit determines a logic value of the data based on the data strobe signal.

4. The storage controller of claim 3 , wherein the I/O circuit is connected with the first ODT circuit via the strobe signal line and is connected with the second ODT circuit via the at least one data line.

5. The storage controller of claim 1 , wherein the first ODT circuit comprises:
a plurality of first resistors that are connected in parallel to the strobe signal line;
a plurality of pull-up switches, connected between respective ones of the plurality of first resistors and a power supply voltage;
a plurality of second resistors that are connected in parallel to the strobe signal line; and
a plurality of pull-down switches, connected between respective ones of the plurality of second resistors and a ground voltage.

6. The storage controller of claim 5 , wherein responsive to the ODT control circuit activating the first ODT circuit, the pull-up switches and the pull-down switches receive first ODT control codes that are set in response to a first ODT control signal.

7. The storage controller of claim 1 , wherein the second ODT circuit comprises:
a plurality of first resistors connected in parallel to the at least one data line;
a plurality of pull-up switches, connected between respective ones of the plurality of first resistors and a power supply voltage;
a plurality of second resistors connected in parallel to the at least one data line; and
a plurality of pull-down switches connected between respective ones of the plurality of second resistors and a ground voltage.

8. The storage controller of claim 7 , wherein responsive to the ODT control circuit deactivating the second ODT circuit, the pull-up switches and the pull-down switches are turned off in response to a second ODT control signal.

9. The storage controller of claim 1 , wherein the ODT control circuit controls the first ODT circuit and the second ODT circuit such that a first voltage swing range of the data strobe signal is different from a second voltage swing range of the data.

10. A solid state disk (SSD) comprising:
a plurality of nonvolatile memory devices that store data; and
a storage controller that is configured to control the plurality of nonvolatile memory devices,
wherein the storage controller comprises:
a first on-die termination (ODT) circuit that is configured to provide a first termination resistance with a strobe signal line that is configured to transfer a data strobe signal;
a second ODT circuit that is configured to provide a second termination resistance with at least one data line that transfers the data; and
an ODT control circuit that is configured to individually control activation and deactivation of the first ODT circuit and the second ODT circuit,
wherein the ODT control circuit activates the first ODT circuit and deactivates the second ODT circuit during a reception operation in which the storage controller receives the data from the plurality of nonvolatile memory devices.

11. The SSD of claim 10 , wherein the storage controller exchanges the data strobe signal via a first channel and the data via a second channel and with one of the nonvolatile memory devices.

12. The SSD of claim 10 , wherein each of the nonvolatile memory devices is a NAND flash memory, and at least one of the plurality of nonvolatile memory devices comprises a three-dimensional memory array.

13. The SSD of claim 10 , wherein the storage controller further comprises:
an input/output (I/O) circuit that is configured to receive the data strobe signal and the data, and
wherein the I/O circuit is connected to the strobe signal line and the at least one data line.

14. A device comprising:
a storage controller that is configured to control a plurality of nonvolatile memory devices that are configured to store data,
the storage controller comprising:
a first on-die termination (ODT) circuit that is configured to provide a first termination resistance with a strobe signal line;
a second ODT circuit that is configured to provide a second termination resistance with at least one data line that transfers the data, wherein the first termination resistance is different than the second termination resistance during a reception operation in which the storage controller receives the data from the plurality of nonvolatile memory devices; and
an ODT control circuit that is configured to control activation and deactivation of the first ODT circuit and the second ODT circuit independently,
wherein the storage controller comprises:
a first receiver that includes the first ODT circuit and that receives the data strobe signal from a first channel; and
a second receiver that includes the second ODT circuit and that receives the data from a second channel.

15. The device of claim 14 , wherein the storage controller exchanges the data strobe signal via a first channel and the data via a second channel and with one of the plurality of nonvolatile memory devices, and
wherein each of the first channel and the second channel provides a single-ended signaling interface.

16. The device of claim 14 , wherein each of the first channel and the second channel provides a differential signaling interface.

17. The device of claim 14 , wherein the ODT control circuit activates the first ODT circuit and deactivates the second ODT circuit during the reception operation.

Assignees

• Park Kwang-Soo
• Kim Su-Jin
• Cho Jung-Hee
• Samsung Electronics Co Ltd

Inventors

• Park Kwang-Soo
• Kim Su-Jin
• Cho Jung-Hee

Classifications

• H03K19/0013

  in field effect transistor circuits · CPC title

• H03K19/0005 Primary

  Modifications of input or output impedance · CPC title