Integrated digital discriminator for a silicon photomultiplier
US-9217795-B2 · Dec 22, 2015 · US
US9432011B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9432011-B2 |
| Application number | US-201514856253-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 16, 2015 |
| Priority date | Sep 18, 2014 |
| Publication date | Aug 30, 2016 |
| Grant date | Aug 30, 2016 |
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A semiconductor integrated circuit includes, a fixed frequency-division clock generation unit configured to generate a fixed frequency-division clock with a fixed frequency based on an output clock of a clock source, a variable frequency-division clock generation unit configured to generate a variable frequency-division clock with a variable frequency based on the output clock of the clock source, and a data path selection unit configured to select a data path. The data path selection unit selects a data path with or without a synchronization unit for converting the data into clock-synchronous data on a receiving side according to whether the variable frequency-division clock is or is not, respectively, generated by the variable frequency-division clock generation unit.
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What is claimed is: 1. A semiconductor integrated circuit comprising: a fixed frequency-division clock generation unit configured to generate a fixed frequency-division clock with a fixed frequency based on an output clock of a clock source; a variable frequency-division clock generation unit configured to generate a variable frequency-division clock with a variable frequency based on the output clock of the clock source; and a data path selection unit configured to select a d…
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