Frame pacing for improved experiences in 3D applications
US-12057090-B2 · Aug 6, 2024 · US
US9430992B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9430992-B2 |
| Application number | US-201113992996-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 10, 2011 |
| Priority date | Mar 10, 2011 |
| Publication date | Aug 30, 2016 |
| Grant date | Aug 30, 2016 |
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Official abstract text for this publication.
A first look-up table ( 10 ) outputs a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A second look-up table ( 12 ) outputs a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. A third look-up table ( 14 ) outputs a residue as a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A fourth look-up table ( 16 ) outputs a residue as a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. The output values of the first and second look-up tables ( 10,12 ) are addresses of the cell for burst access to the memory. The output values of the third and fourth look-up tables ( 14,16 ) are used as pixel addresses in the cell.
Opening claim text (preview).
The invention claimed is: 1. A memory access device, comprising: calculating a number of pixels in one burst access by dividing a number of bits obtained in one burst access of a memory storing an image frame by a number of bits per pixel and discarding a fraction of a remainder after dividing the number of bits obtained in one burst access of the memory storing the image frame by the number of bits per pixel; arranging a rectangular area having number of pixels equal to or less…
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