Hardware countermeasures in a fault tolerant security architecture
US-2024370591-A1 · Nov 7, 2024 · US
US9430656B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9430656-B2 |
| Application number | US-201313904518-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 29, 2013 |
| Priority date | Jun 4, 2012 |
| Publication date | Aug 30, 2016 |
| Grant date | Aug 30, 2016 |
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A device for carrying out a cryptographic method has an input interface for receiving input data, an output interface for outputting output data, and a cryptographic unit for carrying out the cryptographic method. A first functional unit is provided which is designed to convert at least a portion of the input data into transformed input data using a first deterministic method, and to supply the transformed input data to the cryptographic unit, and/or a second functional unit is provided which is designed to convert at least a portion of output data of the cryptographic unit into transformed output data using a second deterministic method, and to supply the transformed output data to the output interface.
Opening claim text (preview).
What is claimed is: 1. A hardware device, comprising: an electronic input interface; an electronic output interface; and cryptographic processing circuitry; wherein the device is configured to: convert at least a portion of binary digit input data received via the electronic input interface into transformed input data using a first deterministic method to ensure a first digital decorrelation, the first digital decorrelation being of the binary digit input data with respect…
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