Non-volatile memory system and host configured to communicate with the same

Patent metadata

Field	Value
Publication number	US-9430374-B2
Application number	US-201314068831-A
Country	US
Kind code	B2
Filing date	Oct 31, 2013
Priority date	Nov 2, 2012
Publication date	Aug 30, 2016
Grant date	Aug 30, 2016

Abstract

A nonvolatile memory system includes a memory controller for copying a mapping data group including logical-physical address mapping information regarding user data from a nonvolatile memory to a mapping information storage unit, and transmit size information regarding the mapping data group to a host. The host may receive size information regarding the mapping data group from the nonvolatile memory system, and determine the order of commands to be transmitted to the nonvolatile memory based on the size information regarding the mapping data group.

First claim

What is claimed is:

1. A non-volatile memory system comprising:
a non-volatile memory configured to store user data and a plurality of mapping data groups, the mapping data groups including mapping information mapping between a logical address and a physical address of the user data;
a mapping information storage unit configured to store at least one of the mapping data groups; and
a memory controller configured to transmit size information regarding the size of the mapping data groups to a host device that is in communication with the non-volatile memory system and copy a requested mapping data group, of the plurality of mapping data groups, including mapping information regarding data requested by the host device to be accessed from the non-volatile memory to the mapping information storage unit,
wherein the host device is external with respect to the non-volatile memory system.

2. The system of claim 1 , wherein each of the mapping data groups of the plurality of mapping data groups includes mapping information corresponding to a predetermined number of logical addresses that sequentially increase.

3. The system of claim 1 , wherein the memory controller receives a command packet including a plurality of commands to access requested user data, from the host device, and provides access to the data according to an order of the commands included in the command packet.

4. The system of claim 1 , wherein the memory controller scrambles or otherwise encrypts the size information regarding the requested mapping data group and transmits the scrambled or otherwise encrypted size information to the host device.

5. The system of claim 1 , wherein the memory controller receives a command to change a size of the mapping data group, from the host device, and changes the size of the requested mapping data group copied from the non-volatile memory to the mapping information storage unit.

6. The system of claim 5 , wherein the command to change the size of the mapping data group is scrambled or otherwise encrypted, and
the memory controller unscrambles/decrypts the scrambled or otherwise encrypted command and changes the size of the mapping data group copied from the non-volatile memory to the mapping information storage unit.

7. The system of claim 1 , wherein the non-volatile memory is a NAND flash memory.

8. The system of claim 1 , wherein the system is a multimedia card (MMC) or an embedded multimedia card (eMMC).

9. A host system comprising:
an interface unit configured to communicate with a non-volatile memory system that is in communication with, and external with respect to, the host system, the non-volatile memory system configured to store a plurality of mapping data groups including mapping information mapping between logical addresses of user data and physical addresses of the user data within the host system;
a command output unit configured to output at least one command to access the user data; and
a command packet generating unit configured to receive a plurality of commands from the command output unit, determine an order of the plurality of commands based on size information regarding the plurality of mapping data groups to generate a command packet, and transmit the command packet to the non-volatile memory system via the interface unit.

10. The host of claim 9 , wherein each of the plurality of mapping data groups includes mapping information corresponding to a predetermined number of logical addresses that sequentially increase.

11. The host of claim 9 , wherein the command packet generating unit determines the order of commands belonging to the command packet such that data corresponding to logical addresses belonging to the same mapping data group are sequentially accessed.

12. The host of claim 9 , wherein the command output unit is included in a central processing unit (CPU) of the host.

13. The host of claim 12 , wherein the command output unit outputs a command to change the size of the mapping data group of the non-volatile memory system.

14. The host of claim 9 , wherein size information regarding the mapping data group received from the non-volatile memory system is scrambled or otherwise encrypted, and
the command packet generating unit unscrambles/decrypts and stores the scrambled or otherwise encrypted size information regarding the mapping data group.

15. The host of claim 9 , wherein the interface unit supports an MMC or an eMMC protocol.

16. A non-volatile memory system comprising:
a non-volatile memory configured to store user data and mapping data for mapping between a logical address and a physical address of the user data stored in the non-volatile memory; and
a mapping data cache unit configured to store a copy of at least some of the mapping data stored in the non-volatile memory,
wherein the non-volatile memory system is configured to send to a host device that is in communication with the non-volatile memory system, size information indicating a size of the at least some of the mapping data stored in the mapping data cache, and
wherein an order in which the host device sends commands to the non-volatile memory system is depended upon the sent size information,
wherein the host device is external with respect to the non-volatile memory system.

17. The system of claim 16 , wherein the mapping data stored in the mapping data cache corresponds to a predetermined sequence of logical addresses.

18. The system of claim 16 , wherein the size information sent to the host device is encrypted prior to transmission.

19. The system of claim 16 , wherein the non-volatile memory system is configured to change the size of the mapping data stored in the non-volatile memory in response to a request from the host device.

20. The system of claim 19 , wherein the request from the host device to change the size of the mapping data stored in the non-volatile memory is encrypted and the non-volatile memory system is configured to decrypt the encrypted request.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Jong-Won
• Yang Woo-Young
• Lee Han-Deok

Classifications

• G06F12/10

  Address translation · CPC title

• G06F3/0638

  Organizing or formatting or addressing of data · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F3/0611

  in relation to response time · CPC title