Method and system for block scheduling control in a processor by remapping

Patent metadata

Field	Value
Publication number	US-9430304-B2
Application number	US-201414523682-A
Country	US
Kind code	B2
Filing date	Oct 24, 2014
Priority date	Oct 24, 2014
Publication date	Aug 30, 2016
Grant date	Aug 30, 2016

Abstract

A method and a system for block scheduling are disclosed. The method includes retrieving an original block ID, determining a corresponding new block ID from a mapping, executing a new block corresponding to the new block ID, and repeating the retrieving, determining, and executing for each original block ID. The system includes a program memory configured to store multi-block computer programs, an identifier memory configured to store block identifiers (ID's), management hardware configured to retrieve an original block ID from the program memory, scheduling hardware configured to receive the original block ID from the management hardware and determine a new block ID corresponding to the original block ID using a stored mapping, and processing hardware configured to receive the new block ID from the scheduling hardware and execute a new block corresponding to the new block ID.

First claim

What is claimed is:

1. A method for block scheduling, the method comprising:
retrieving an original block identifier (ID) from a plurality of block IDs, wherein each of the plurality of block IDs identifies a block of memory;
performing a mathematical operation on the original block ID to create a mapping, wherein the mapping represents an execution order for the plurality of block IDs:
determining, from the mapping, a new block ID corresponding to the original block ID;
scheduling execution of a new block identified by the new block ID;
executing the new block; and
repeating the retrieving, performing, determining, scheduling, and executing for each of the plurality of block IDs.

2. The method of claim 1 , wherein each of the plurality of block IDs is retrieved in a predetermined order.

3. The method of claim 1 , wherein the mapping is further created by analyzing a program to be executed based on platform-specific information.

4. The method of claim 1 , wherein the mapping is further created by programming using an application program interface (API).

5. The method of claim 1 , wherein the mapping is reconfigured during execution of a kernel.

6. The method of claim 1 , wherein the original block and the new block each comprises an object executing a kernel in processing hardware, the object comprising a work item, a workgroup, a thread block, or a thread group.

7. The method of claim 6 , wherein the processing hardware comprises at least one of: a graphics processing unit, or a central processing unit.

8. The method of claim 1 , further comprising:
creating a two-dimensional array of the plurality of block IDs;
wherein the mathematical operation includes a transpose function performed on the two-dimensional array.

9. An apparatus for block scheduling in a processor comprising:
a program memory configured to store multi-block computer programs;
an identifier memory configured to store block identifiers (IDs), wherein each of the of block IDs identifies a block of program memory;
management hardware configured to retrieve one or more original block IDs from the identifier memory;
scheduling hardware configured to:
receive the one or more original block IDs from the management hardware,
perform a mathematical operation on the one or more original block IDs to create a mapping, wherein the mapping represents an execution order of the block IDs,
determine, from the mapping, one or more new block IDs corresponding to the one or more original block IDs, and
schedule execution of one or more new blocks identified by the one or more new block IDs; and

processing hardware configured to:
receive the one or more new block IDs from the scheduling hardware, and
execute the one or more new blocks identified by the one or more new block IDs.

10. The apparatus of claim 9 , wherein the management hardware is configured to retrieve original block IDs from the program memory in a predetermined order.

11. The apparatus of claim 9 , wherein the mapping is further based on analysis of a program to be executed and the analysis is based on platform-specific information.

12. The apparatus of claim 9 , wherein the mapping is further created using an application program interface (API).

13. The apparatus of claim 9 , wherein the scheduling hardware is configured to reconfigure the mapping during execution of a kernel.

14. The apparatus of claim 9 , wherein the processing hardware is configured to execute the new block as an object executing a kernel, the object comprising a work item, a workgroup, a thread block, or a thread group.

15. The apparatus of claim 9 , wherein the processing hardware comprises at least one of: a graphics processing unit, or a central processing unit.

16. The apparatus of claim 9 , wherein:
the scheduling hardware is further configured to create a two-dimensional array of the one or more original block IDs;
the mathematical operation includes a transpose function performed on the two-dimensional array.

Assignees

• Advanced Micro Devices Inc

Inventors

• Che Shuai
• Hower Derek R

Classifications

• G06T1/20 Primary

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06T2200/28

  involving image processing hardware · CPC title

• G06F9/547 Primary

  Remote procedure calls [RPC]; Web services · CPC title

• G06F9/4881

  Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues · CPC title